SLATA5GM1U STEC, SLATA5GM1U Datasheet - Page 5
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SLATA5GM1U
Manufacturer Part Number
SLATA5GM1U
Description
Manufacturer
STEC
Datasheet
1.SLATA5GM1U.pdf
(32 pages)
Specifications of SLATA5GM1U
Lead Free Status / RoHS Status
Compliant
SLATAxxx(M/G)M1U(I)
Datasheet
1.3
BVD2
(PC Card Memory Mode)
-SPKR
(PC Card I/O Mode)
-DASP
(True IDE Mode)
-CD1, -CD2
(PC Card Memory Mode)
-CD1, -CD2
-CD1, -CD2
D15-D00
(PC Card Memory Mode)
D15-D00
PC Card I/O Mode
D15-D00
(True IDE Mode)
-IOWR
(PC Card Memory Mode)
-IOWR
(PC Card I/O Mode)
-IOWR
(True IDE Mode)
-IORD
(PC Card Memory Mode)
-IORD
(PC Card I/O Mode)
-IORD
(True IDE Mode)
-WE
(PC Card Memory Mode)
-WE
(PC Card I/O Mode)
-WE
(True IDE Mode)
(PC Card I/O Mode)
(True IDE Mode)
Signal Descriptions
Signal Name
I/O
I/O
I/O
I
I
I
Type
Table 3: ATA PC Card Signal Descriptions
62
37, 38,
44
36, 67
39, 40,
41, 66,
65, 64, 6,
5, 4, 3, 2,
32, 31, 30
45
15
Number
Pin
61000-04497-104, January 2007
This output line is always driven to a high state in Memory
Mode since a battery is not required for this product.
This output line is always driven to a high state in I/O Mode
since this product produces no audio.
In the True IDE Mode, this input/output is the Disk
Active/Slave Present signal in the Master/Slave handshake
protocol.
These Card Detect pins are connected to ground on the card.
They are used by the host to determine that the card is fully
inserted into the socket.
This signal is the same as Memory Mode.
These signals are not used in IDE Mode.
These lines carry the data, commands, and host and the
controller. D00 is the LSB of the LSB of the Odd Byte of the
Word.
This signal is the same as the PC Card Memory Mode signal.
In True IDE Mode, all Task File operations occur in byte mode
on the low order bus D00-D07 while all data transfers are 16
bit using D00-D15.
This signal is not used in this mode.
The I/O Write strobe pulse is used to clock I/O data onto the
data bus and into the controller registers. The clocking occurs
on the negative to positive edge of the signal (trailing edge).
In True IDE Mode, this signal has the same function as in PC
Card I/O Mode.
This signal is not used in this mode.
This is an I/O Read strobe generated by the host. This signal
gates I/O data onto the bus from the ATA PC Card.
In True IDE Mode, this signal has the same function as in PC
Card I/O Mode.
This is a signal driven by the host and used for strobing
memory write data into the registers. It is also used for writing
the configuration registers.
In PC Card I/O Mode, this signal is used for writing the
configuration registers.
In True IDE Mode, this input signal is not used and should be
connected to VCC.
Description
ATA PC Card
5