SMC256BFJ6E Micron Technology Inc, SMC256BFJ6E Datasheet - Page 53

• Manufacturer Part Number: SMC256BFJ6E
• Manufacturer: Micron Technology Inc

Specifications of SMC256BFJ6E

• Lead Free Status / RoHS Status: Supplier Unconfirmed

SMCxxxBF
9.11
9.11.1
9.11.2
9.11.3
9.11.4
9.11.5
9.11.6
9.11.7
9.11.8
Card (drive) address register
The card (drive) address register is located at address 3F7h [377h], offset Fh.
This read-only register is provided for compatibility with the AT disk drive interface and can
be used for confirming the drive status. It is recommended that this register is not mapped
into the host’s I/O space because of potential conflicts on bit 7. The bits are defined as
follows.
Bit 7
This bit is don’t care.
Bit 6 (–WTG)
This bit is ‘0’ when a write operation is in progress, otherwise, it is ‘1’.
Bit 5 (–HS3)
This bit is the negation of bit 3 in the drive/head register.
Bit 4 (–HS2)
This bit is the negation of bit 2 in the drive/head register.
Bit 3 (–HS1)
This bit is the negation of bit 1 in the drive/head register.
Bit 2 (–HS0)
This bit is the negation of bit 0 in the drive/head register.
Bit 1 (–nDS1)
This bit is ‘0’ when drive 1 is active and selected.
Bit 0 (–nDS0)
This bit is ‘0’ when the drive 0 is active and selected.
Table 47.
D7
X
Card (drive) address register
–WTG
D6
–HS3
D5
–HS2
D4
–HS1
D3
–HS0
D2
–nDS1
CF-ATA registers
D1
–nDS0
D0
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