SMC256BFJ6E Micron Technology Inc, SMC256BFJ6E Datasheet - Page 29

• Manufacturer Part Number: SMC256BFJ6E
• Manufacturer: Micron Technology Inc

Specifications of SMC256BFJ6E

• Lead Free Status / RoHS Status: Supplier Unconfirmed

SMCxxxBF
5.4
Figure 8.
1. The device addresses consists of −CS0, −CS1, and A2-A0.
2. The data I/O consist of D15-D0 (16-bit) or D7-D0 (8 bit).
3. −IOCS16 is shown for PIO modes 0, 1 and 2. For other modes, this signal is ignored.
A0-A2, −CS0, −CS1
Read Data D0-D15
Write Data D0-D15
−IORD/−IOWR
−IOCS16
True IDE mode
The timing waveforms for true IDE mode and true IDE DMA mode of operation in this
section are drawn using the conventions in the ATA-4 specification, which are different than
the conventions used in the PCMCIA specification and earlier versions of this specification.
Signals are shown with their asserted state as High regardless of whether the signal is
actually negative or positive true. Consequently, the -IORD, the -IOWR and the -IOCS16
signals are shown in the waveforms inverted from their electrical states on the bus.
True IDE PIO mode read/write waveforms
(2)
(1)
(2)
(3)
t7
t1
ADDRESS VALID
t0
t2
t3
t5
VALID
VALID
t4
t6
t6z
t9
Command interface
t2i
t8
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