SMC256BFJ6E Micron Technology Inc, SMC256BFJ6E Datasheet - Page 50
SMC256BFJ6E
Manufacturer Part Number
SMC256BFJ6E
Description
Manufacturer
Micron Technology Inc
Datasheet
1.SMC256BFJ6E.pdf
(90 pages)
Specifications of SMC256BFJ6E
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CF-ATA registers
9.8
9.8.1
9.8.2
9.8.3
9.8.4
9.8.5
9.8.6
9.8.7
9.8.8
50/90
Drive/head (LBA 27-24) register
The driver/head register is located at address 1F6h [176h], offset 6h.
The drive/head register is used to select the drive and head. It is also used to select LBA
addressing instead of cylinder/head/sector addressing. The bits are defined in
Bit 7
This bit is set to ‘1’.
Bit 6 (LBA)
LBA is a flag to select either cylinder/head/sector (CHS) or logical block address mode
(LBA). When LBA is set to ‘0’, cylinder/head/sector mode is selected. When LBA is set to’1’,
logical block address is selected. In logical block mode, the logical block address is
interpreted as follows:
Bit 5
This bit is set to ‘1’.
Bit 4 (DRV)
DRV is the drive number. When DRV is ‘0’, drive/card 0 is selected (master). When DRV is
‘1’, drive/card 1 is selected (slave). The card is set to card 0 or 1 using the copy field (drive
#) of the PCMCIA socket & copy configuration register.
Bit 3 (HS3)
When operating in the cylinder, head, sector mode, this is bit 3 of the head number. It is bit
27 in the logical block address mode.
Bit 2 (HS2)
When operating in the cylinder, head, sector mode, this is bit 2 of the head number. It is bit
26 in the logical block address mode.
Bit 1 (HS1)
When operating in the cylinder, head, sector mode, this is bit 1 of the head number. It is bit
25 in the logical block address mode.
Bit 0 (HS0)
When operating in the cylinder, head, sector mode, this is bit 0 of the head number. It is bit
24 in the logical block address mode.
LBA7-LBA0: sector number register D7 to D0
LBA15-LBA8: cylinder low register D7 to D0
LBA23-LBA16: cylinder high register D7 to D0
LBA27-LBA24: drive/head register bits HS3 to HS0
Table 44
SMCxxxBF
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