S29GL064N90BFI040 Spansion Inc., S29GL064N90BFI040 Datasheet - Page 41
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S29GL064N90BFI040
Manufacturer Part Number
S29GL064N90BFI040
Description
Manufacturer
Spansion Inc.
Datasheet
1.S29GL064N90BFI040.pdf
(81 pages)
Specifications of S29GL064N90BFI040
Cell Type
NOR
Density
64Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
23/22Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
FBGA
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
8M/4M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S29GL064N90BFI040A
Manufacturer:
INTEL
Quantity:
3 574
10. Command Definitions
10.1
10.2
October 29, 2008 S29GL-N_01_12
Reading Array Data
Reset Command
Writing specific address and data commands or sequences into the command register initiates device
operations.
Writing incorrect address and data values or writing them in the improper sequence may place the device in
an unknown state. A reset command is then required to return the device to reading array data.
All addresses are latched on the falling edge of WE# or CE#, whichever happens later. All data is latched on
the rising edge of WE# or CE#, whichever happens first. Refer to the AC Characteristics section for timing
diagrams.
The device is automatically set to reading array data after device power-up. No commands are required to
retrieve data. The device is ready to read array data after completing an Embedded Program or Embedded
Erase algorithm.
After the device accepts an Erase Suspend command, the device enters the erase-suspend-read mode, after
which the system can read data from any non-erase-suspended sector. After completing a programming
operation in the Erase Suspend mode, the system may once again read array data with the same exception.
See
The system must issue the reset command to return the device to the read (or erase-suspend-read) mode if
DQ5 goes high during an active program or erase operation, or if the device is in the autoselect mode. See
the next section, Reset Command, for more information.
See also Requirements for Reading Array Data in the Device Bus Operations section for more information.
The Read-Only
on page 65
Writing the reset command resets the device to the read or erase-suspend-read mode. Address bits are don’t
cares for this command.
The reset command may be written between the sequence cycles in an erase command sequence before
erasing begins. This resets the device to the read mode. Once erasure begins, however, the device ignores
reset commands until the operation is complete.
The reset command may be written between the sequence cycles in a program command sequence before
programming begins. This resets the device to the read mode. If the program command sequence is written
while the device is in the Erase Suspend mode, writing the reset command returns the device to the erase-
suspend-read mode. Once programming begins, however, the device ignores reset commands until the
operation is complete.
The reset command may be written between the sequence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command must be written to return to the read mode. If the device
entered the autoselect mode while in the Erase Suspend mode, writing the reset command returns the device
to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation, writing the reset command returns the device to the
read mode (or erase-suspend-read mode if the device was in Erase Suspend).
Note that if DQ1 goes high during a Write Buffer Programming operation, the system must write the Write-to-
Buffer-Abort Reset command sequence to reset the device for the next operation.
Erase Suspend/Erase Resume Commands on page 50
Table 10.1 on page 51
shows the timing diagram.
Operations–AC Characteristics on page 64
D a t a
S29GL-N MirrorBit
and
S h e e t
Table 10.3 on page 53
®
Flash Family
provide the read parameters, and
for more information.
define the valid register command sequences.
Figure 15.2
41