S29GL064N90BFI040 Spansion Inc., S29GL064N90BFI040 Datasheet
S29GL064N90BFI040
Specifications of S29GL064N90BFI040
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S29GL064N90BFI040 Summary of contents
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... S29GL-N MirrorBit S29GL064N, S29GL032N 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology Data Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production ...
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... Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.” ...
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... – Data# polling & toggle bits provide status – CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices – Unlock Bypass Program command reduces overall multiple-word programming time Hardware features – WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production ...
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... The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device. The device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses are stable for a specified period of time ...
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... Password Sector Protection 8.13 Password and Password Protection Mode Lock Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.14 Persistent Protection Bit Lock (PPB Lock Bit 8.15 Secured Silicon Sector Flash Memory Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.16 Write Protect (WP#/ACC 8.17 Hardware Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 9. Common Flash Memory Interface (CFI ...
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... TS056—56-Pin Standard Thin Small Outline Package (TSOP 17.3 VBK048—Ball Fine-pitch Ball Grid Array (BGA) 8.15x 6.15 mm Package . . . . . . . . . . . . . . 76 17.4 LAA064—64-Ball Fortified Ball Grid Array (BGA Package . . . . . . . . . . . . . . . . 77 17.5 LAE064-64-Ball Fortified Ball Grid Array (BGA Package . . . . . . . . . . . . . . . . . . . 78 18. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ® S29GL-N MirrorBit Flash Family S29GL-N_01_12 October 29, 2008 ...
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... Figure 15.7 Chip/Sector Erase Operation Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 Figure 15.8 Data# Polling Timings (During Embedded Algorithms .69 Figure 15.9 Toggle Bit Timings (During Embedded Algorithms .70 Figure 15.10 DQ2 vs. DQ6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70 Figure 15.11 Alternate CE# Controlled Write (Erase/Program) Operation Timings . . . . . . . . . . . . . . . . . . .72 October 29, 2008 S29GL-N_01_12 ® S29GL-N MirrorBit Flash Family 7 ...
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... Table 15.1 Read-Only Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 Table 15.2 Hardware Reset (RESET .66 Table 15.3 Erase and Program Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Table 15.4 Alternate CE# Controlled Erase and Program Operations . . . . . . . . . . . . . . . . . . . . . . . . . . .71 Table 16.1 TSOP Pin and BGA Package Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (Note . . .53 IL ® S29GL-N MirrorBit Flash Family S29GL-N_01_12 October 29, 2008 ...
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... 2.7–3 2.7–3 1.65–3 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder ® S29GL-N MirrorBit Flash Family S29GL064N S29GL032N 90 90 110 110 90 110 90 110 90 110 90 110 DQ15 DQ0 (A-1) – ...
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... Connection Diagrams Special Package Handling Instructions Special handling is required for Flash Memory products in molded packages (TSOP and BGA). The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. A15 A14 A13 A12 ...
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... A12 A14 A15 A16 A10 A11 DQ7 WE# RESET# A21 A19 DQ5 RY/BY# WP#/ACC A18 A20 DQ2 A17 A6 A5 DQ0 ® S29GL-N MirrorBit Flash Family NC on 03, 04 options BYTE# DQ15/A DQ14 DQ13 DQ6 DQ12 DQ4 DQ10 DQ11 DQ3 DQ8 DQ9 DQ1 CE# OE ...
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... D6 E6 A12 A14 A15 A16 BYTE A10 A11 DQ7 RESET# A21 A19 DQ5 WP#/ACC A18 A20 DQ2 A17 A6 A5 DQ0 ® S29GL-N MirrorBit Flash Family DQ15/A DQ14 DQ13 DQ6 DQ12 DQ4 DQ10 DQ11 DQ3 DQ8 DQ9 DQ1 CE# OE# S29GL-N_01_12 October 29, 2008 ...
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... Hardware Write Protect input Hardware Reset Pin input Ready/Busy output Selects 8-bit or 16-bit mode 3.0 volt-only single power supply (see Product Selector Guide voltage supply tolerances) Output Buffer Power Device Ground Pin Not Connected Internally ® S29GL-N MirrorBit Flash Family for speed options and 13 ...
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... WP#/ACC RESET RY/BY# BYTE Figure 5.2 S29GL064N Logic Symbol (A-1) 16 Figure 5.5 S29GL032N Logic Symbol (A-1) ® S29GL-N MirrorBit Flash Family (Models 03, 04) A21– DQ15–DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# BYTE# RY/BY# (Models 03, 04) A20– DQ15–DQ0 CE# (A-1) OE# ...
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... PACKAGE TYPE Fortified Ball-Grid Array Package(LAE064 SPEED OPTION See Product Selector Guide and Valid Combinations ( ns 110 ns) DEVICE NUMBER/DESCRIPTION S29GL032N 32 Megabit Page-Mode Flash Memory Manufactured using 110 nm MirrorBit Table 6.1 S29GL032N Ordering Options S29GL032N Valid Combinations Device Speed Package, Material, Number Option & ...
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... F = Fortified Ball-Grid Array Package (LAA064 Thin Small Outline Package (TSOP) Standard Pinout SPEED OPTION See Product Selector Guide and Valid Combinations ( ns 110 ns) DEVICE NUMBER/DESCRIPTION S29GL064N, 64 Megabit Page-Mode Flash Memory Manufactured using 110 nm MirrorBit 7.1 Valid Combinations Speed Device Number Option S29GL064N Notes 1. Type 0 is standard. Specify others as required: TSOPs can be packed in Types 0 and 3 ...
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... All addresses are latched on the falling edge of CE#. Data will appear which is equal to the delay from stable addresses to valid output ACC . Data is output on DQ15-DQ0 pins after the access time (t IL for more information. Refer to Table 13.1 on page 62 ® S29GL-N MirrorBit Flash Family DQ8–DQ15 DQ0– BYTE# BYTE# Addresses DQ7 = ...
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... Unlock Bypass mode, temporarily HH from the WP#/ACC or ACC pin, depending on model number, returns apply in this mode. Refer to ACC for more information. ® S29GL-N MirrorBit Flash Family . When CE# is PACC Fast page mode ACC CE , and OE Word 8 ...
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... Current is reduced for the duration of the RESET# pulse. When RESET# is held at V draws CMOS standby current (I The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firmware from the Flash memory. ...
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... SA61 111101 64/32 0F0000h–0F7FFFh SA62 111110 64/32 0F8000h–0FFFFFh SA63 111111 64/32 ® S29GL-N MirrorBit Flash Family 8-bit 16-bit Address Address Range Range 200000h–20FFFFh 100000h–107FFFh 210000h–21FFFFh 108000h–10FFFFh 220000h–22FFFFh 110000h–117FFFh 230000h–23FFFFh 118000h–11FFFFh 240000h– ...
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... F8000h–FFFFFh SA67 111111100 100000h–107FFFh SA68 111111101 108000h–10FFFFh SA69 111111110 110000h–117FFFh SA70 111111111 118000h–11FFFFh ® S29GL-N MirrorBit Flash Family Sector Size 8-bit 16-bit (KB/ Address Address Range Range 64/32 240000h–24FFFFh 120000h–127FFFh 64/32 250000h–25FFFFh 128000h–12FFFFh 64/32 260000h– ...
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... D0000h–D7FFFh SA68 111101xxx 64/32 D8000h–DFFFFh SA69 111110xxx 64/32 SA70 111111xxx 64/32 ® S29GL-N MirrorBit Flash Family 8-bit 16-bit Address Address Range Range 1C0000h–1CFFFFh E0000h–E7FFFh 1D0000h–1DFFFFh E8000h–EFFFFh 1E0000h–1EFFFFh F0000h–F7FFFh 1F0000h–1FFFFFh F8000h–FFFFFh 200000h– ...
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... SA105 1101001 150000h–157FFFh SA106 1101010 158000h–15FFFFh SA107 1101011 160000h–167FFFh SA108 1101100 168000h–16FFFFh SA109 1101101 ® S29GL-N MirrorBit Flash Family Sector Size 8-bit 16-bit (KB/ Address Address Kwords) Range Range 64/32 400000h–40FFFFh 200000h–207FFFh 64/32 410000h–41FFFFh 208000h–20FFFFh 64/32 420000h– ...
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... SA87 1010111xxx 0A0000h–0A7FFFh SA88 1011000xxx 0A8000h–0AFFFFh SA89 1011001xxx 0B0000h–0B7FFFh SA90 1011010xxx ® S29GL-N MirrorBit Flash Family Size 8-bit 16-bit (KB/ Address Address Range Range 6E0000h–6EFFFFh 370000h–377FFFh 6F0000h–6FFFFFh 378000h–37FFFFh 700000h–70FFFFh 380000h–387FFFh 710000h– ...
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... SA131 1111111100 200000h–207FFFh SA132 1111111101 208000h–20FFFFh SA133 1111111110 210000h–217FFFh SA134 1111111111 218000h–21FFFFh ® S29GL-N MirrorBit Flash Family Sector Size 8-bit 16-bit (KB/ Address Address Kwords) Range Range 64/32 5B0000h–5BFFFFh 2D8000h–2DFFFFh 64/32 5C0000h–5CFFFFh 2E0000h– ...
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... SA86 1001111xxx 118000h–11FFFFh SA87 1010000xxx 120000h–127FFFh SA88 1010001xxx 128000h–12FFFFh SA89 1010010xxx 298000h–29FFFFh SA112 1101001xxx ® S29GL-N MirrorBit Flash Family Sector Size 8-bit 16-bit (KB/ Address Address Range Range 64/32 260000h–26FFFFh 130000h–137FFFh 64/32 270000h–27FFFFh 138000h–13FFFFh 64/32 280000h– ...
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... SA76 068000–06FFFF SA77 070000–077FFF SA78 078000–07FFFF SA79 080000–087FFF SA80 088000–08FFFF SA81 090000–097FFF SA82 ® S29GL-N MirrorBit Flash Family Sector Size 8-bit 16-bit (KB/ Address Address Kwords) Range Range 64/32 6A0000h–6AFFFFh 350000h–357FFFh 64/32 6B0000h–6BFFFFh 358000h– ...
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... SA122 2D8000–2DFFFF SA123 2E0000–2E7FFF SA124 2E8000–2EFFFF SA125 2F0000–2F7FFF SA126 2F8000–2FFFFF SA127 ® S29GL-N MirrorBit Flash Family 16-bit Address A21–A15 Range 1010011 198000–19FFFF 1010100 1A0000–1A7FFF 1010101 1A8000–1AFFFF 1010110 1B0000–1B7FFF 1010111 1B8000– ...
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... ® S29GL-N MirrorBit Flash Family on address pin A9. Address pins A6, ID Table 8.2 - Table 8.8). 53. This method does not DQ7 to DQ0 Model Number BYTE# 01, 02 06, 07 V1, V2 03 01h 01h 01h X 7Eh 7Eh 7Eh X 0Ch 10h 13h 00h (04, bottom boot) X 01h 01h ...
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... Persistent Sector Protection Mode into the Password Protection Mode. The device is shipped with all sectors unprotected. Spansion offers the option of programming and protecting sectors at the factory prior to shipping the device through the ExpressFlash™ Service. Contact your sales representative for details. ...
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... Persistent Protection Mode Lock Bit The sector is protected and can be changed by a simple command A sector is protected and cannot be changed The sector is unprotected and can be changed by a simple command ® S29GL-N MirrorBit Flash Family DQ1 DQ0 Secured Silicon Sector Lock Bit Protection Bit 31 ...
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... PPB erasing. All PPB bits erase in parallel, unlike programming where individual PPB bits are programmable. The PPB bits are limited to the same number of cycles as a flash memory sector. Programming the PPB bit requires the typical word programming time without utilizing the Write Buffer. ...
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... Protected – PPB and DYB are changeable Unprotect Freeze Protected – PPB not changeable, DYB is changeable Protect Unfreeze Protected – PPB and DYB are changeable Protect Freeze Protected – PPB not changeable, DYB is changeable ® S29GL-N MirrorBit Flash Family Sector State 33 ...
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... If they match, the PPB Lock Bit is cleared to the unfreezed state, and the PPB bits can be altered. If they do not match, the flash device does nothing. There is a built-in 2 µs delay for each password check after the valid 64-bit password is entered for the PPB Lock Bit to be cleared to the “ ...
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... Secured Silicon Sector Flash Memory Region The Secured Silicon Sector feature provides a Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The Secured Silicon Sector is 256 bytes in length, and uses a Secured Silicon Sector Indicator Bit (DQ7) to indicate whether or not the Secured Silicon Sector is locked when shipped from the factory ...
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... ESN at addresses 000000h–000007h. Please contact your sales representative for details on ordering ESN Factory Locked devices. Customers may opt to have their code programmed by the factory through the ExpressFlash service (Express Flash Factory Locked). The devices are then shipped from the factory with the Secured Silicon Sector permanently locked ...
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... Software support can then be device-independent, JEDEC ID-independent, and forward- and backward-compatible for the specified flash device families. Flash vendors can standardize their existing interfaces for long-term compatibility. This device enters the CFI Query mode when the system writes the CFI Query command, 98h, to address 55h, any time the device is ready to read array data ...
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... Max. timeout per individual block erase 2 Max. timeout for full chip erase 2 4Ch 0000h (00h = not supported) and time-outs of the product. Please consult the Ordering Information CC ® S29GL-N MirrorBit Flash Family pin present) PP pin present µ (00h = not supported) N times typical ...
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... Table 9.3 Device Geometry Definition Data Description N Device Size = 2 byte 4Eh 00xxh 0017h = 64 Mb, 0016h = 32 Mb Flash Device Interface description (refer to CFI publication 100) 50h 000xh 0001h = x16-only bus devices 52h 0000h 0002h = x8/x16 bus devices 54h 0005h Max. number of byte in multi-byte write = 2 ...
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... Top/Bottom Boot Sector Flag 9Eh 00xxh 02h = Bottom Boot Device, 03h = Top Boot Device, 04h = Uniform sectors bottom WP# protect, 05h = Uniform sectors top WP# protect Program Suspend A0h 0001h 00h = Not Supported, 01h = Supported ® S29GL-N MirrorBit Flash Family S29GL-N_01_12 October 29, 2008 ...
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... Note that if DQ1 goes high during a Write Buffer Programming operation, the system must write the Write-to- Buffer-Abort Reset command sequence to reset the device for the next operation. October 29, 2008 S29GL-N_01_12 and Table 10.3 on page 53 define the valid register command sequences. for more information. provide the read parameters, and ® S29GL-N MirrorBit Flash Family Figure 15.2 41 ...
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... For such application requirements, please contact your local Spansion representative. Word programming is supported for backward compatibility with existing Flash driver software and for occasional writing of individual words. Use of write buffer programming (see below) is strongly recommended for general programming use when more than a few words are to be programmed ...
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... For example, if the system programs six unique address locations, then 05h should be written to the device. This tells the device how many write buffer addresses are loaded with data and therefore when to expect the Program Buffer to Flash command. The number of locations to program cannot exceed the size of the write buffer or the operation aborts. ...
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... Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a program operation is in progress. This flash device is capable of handling multiple write buffer programming operations on the same write buffer address range without intervening erases. For applications requiring incremental bit programming, a modified programming method is required ...
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... Sector Address Write first address/data Yes Abort Write to Yes Buffer Operation? No Write next address/data pair (Note Write program buffer to flash sector address Read DQ7 - DQ0 at Last Loaded Address Yes DQ7 = Data DQ1 = 1? DQ5 = 1? Yes Yes Read DQ7 - DQ0 with address = Last Loaded ...
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... No Increment Address Last Address? and Table 10.3 on page 53 for program command sequence. for more information. Write Operation Status on page 55 ® S29GL-N MirrorBit Flash Family START Data Poll from System Verify Data? No Yes Yes Programming Completed for more information. S29GL-N_01_12 October 29, 2008 ...
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... XXXh/30h Device reverts to operation prior to Program Suspend Table 10.1 on page 51 for information on these status bits. illustrates the algorithm for the erase operation. Refer to for timing diagrams. ® S29GL-N MirrorBit Flash Family and Table 10.3 on page 53 show the Table 15.3 on page 67 for 47 ...
Page 48
... Figure 15.7 on page shows the address and data requirements for the sector erase command sequence. illustrates the algorithm for the erase operation. Refer to for timing diagrams. ® S29GL-N MirrorBit Flash Family Table 10.1 on page 51 and Table 15.3 on page 67 for S29GL-N_01_12 October 29, 2008 ...
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... See the section on DQ3 for information on the sector erase timer. October 29, 2008 S29GL-N_01_12 Figure 10.4 Erase Operation START Write Erase Command Sequence (Notes 1, 2) Data Poll to Erasing Bank from System Embedded Erase algorithm in progress No Data = FFh? Yes Erasure Completed for program command sequence. ® S29GL-N MirrorBit Flash Family 49 ...
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... Resume command are ignored. Another Erase Suspend command can be written after the chip resumes erasing. During an erase operation, this flash device performs multiple internal operations which are invisible to the system. When an erase operation is suspended, any of the internal operations that were not fully completed must be restarted ...
Page 51
... WC = Word Count. Number of write buffer locations to load minus 1. 11. Total number of cycles in command sequence is determined by number of words written to write buffer. Maximum number of cycles in command sequence is 21, including Program Buffer to Flash command. 12. Command sequence resets device for next command after aborted write- to-buffer operation. ...
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... Full address range is required for reading password. 10. Password may be unlocked or read in any order. Unlocking requires the full password (all seven cycles). 11. ACC must 12. “All PPB Erase” command pre-programs all PPBs before erasure to prevent over-erasure. ® S29GL-N MirrorBit Flash Family Fourth Fifth Sixth Addr Data Addr Data ...
Page 53
... Data is 00h for an unprotected sector and 01h for a protected sector. 12. Total number of cycles in command sequence is determined by number of bytes written to write buffer. Maximum number of cycles in command sequence is 37, including Program Buffer to Flash command. 13. Command sequence resets device for next command after aborted write- to-buffer operation. ...
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... Password may be unlocked or read in any order. Unlocking requires the full password (all seven cycles). 11. ACC must 12. “All PPB Erase” command pre-programs all PPBs before erasure to prevent over-erasure. ® S29GL-N MirrorBit Flash Family 4th/11th 5th 6th Addr Data Addr Data Addr ...
Page 55
... Polling algorithm. Figure 15.8 on page 69 October 29, 2008 S29GL-N_01_12 and the following subsections describe the function of these bits. DQ7 shows the outputs for Data# Polling on DQ7. shows the Data# Polling timing diagram. ® S29GL-N MirrorBit Flash Family Figure 10.5 on page 56 shows the Data# 55 ...
Page 56
... Figure 10.5 Data# Polling Algorithm START Read DQ15–DQ0 Addr = VA Yes DQ7 = Data DQ5 = 1? Yes Read DQ15–DQ0 Addr = VA Yes DQ7 = Data? No FAIL . Table 10.5 on page 60 shows the outputs for RY/BY#. ® S29GL-N MirrorBit Flash Family PASS S29GL-N_01_12 October 29, 2008 ...
Page 57
... DQ2 and DQ6 in graphical form. See also the subsection on on page 58. October 29, 2008 S29GL-N_01_12 55). shows the outputs for Toggle Bit I on DQ6. shows the toggle bit timing diagrams. ® S29GL-N MirrorBit Flash Family Figure 10.6 on page 58 shows the toggle Figure 15.10 on page 70 shows DQ2: Toggle Bit II 57 ...
Page 58
... Read DQ7–DQ0 Read DQ7–DQ0 No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 Twice Toggle Bit No = Toggle? Yes Program/Erase Operation Not Program/Erase Complete, Write Operation Complete Reset Command ® S29GL-N MirrorBit Flash Family Table 10.5 on page 60 to compare S29GL-N_01_12 October 29, 2008 ...
Page 59
... DQ2 and DQ6 in graphical for the following discussion. Whenever the system initially begins reading Figure 10.6 on page shows the status of DQ3 relative to the other status bits. ® S29GL-N MirrorBit Flash Family Figure 15.9 on page 70 shows the 58). 59 ...
Page 60
... for more details. Table 10.5 Write Operation Status DQ7 (Note 2) DQ6 DQ7# Toggle 0 Toggle Invalid (not allowed toggle DQ7# Toggle DQ7# Toggle DQ7# Toggle ® S29GL-N MirrorBit Flash Family DQ5 DQ2 (Note 1) DQ3 (Note 2) DQ1 RY/BY# 0 N/A No toggle Toggle N Data 1 0 N/A ...
Page 61
... CC +2 +0 Parameter V for full voltage range input voltage. CC ® S29GL-N MirrorBit Flash Family Rating –65°C to +150°C –65°C to +125°C –0 +4.0 V (Note 2) –0 +12.5 V –0 +0 200 mA to –2.0 V for periods Range –40°C to +85° ...
Page 62
... CCmax IO CC ± 0 +0.3V) / –0.1V WP#/ACC = V IH WP ACC max WP#/ACC = 2.7 –3 2.7 –3 100 µ –100 µ ns. ACC ® S29GL-N MirrorBit Flash Family Min Typ Max WP#/ACC: ±2.0 µA Others: ±1.0 µA 35 ±1 –0 11.5 12.5 11.5 12.5 ...
Page 63
... Table 14.1 Test Specifications Test Condition L Inputs Changing from Changing from Don’t Care, Any Change Permitted Does Not Apply Figure 14.2 Input Waveforms and Measurement Levels 0.5 V Measurement Level IO ® S29GL-N MirrorBit Flash Family 3.3 V 2.7 kΩ All Speeds Unit 1 TTL gate 0 0.5 V ...
Page 64
... Table 15.1 Read-Only Operations Description CE (Note 1) (Note 1) Read Toggle and Data# Polling for test specifications. Figure 15.1 V Power-up Diagram CC t VCS V min ® S29GL-N MirrorBit Flash Family Speed Options Test Setup 90 110 Min 90 110 Max 90 110 IL Max 90 110 Max = 3 V — Max = 3 V — ...
Page 65
... Figure shows device in word mode. Addresses are A1–A-1 for byte mode. October 29, 2008 S29GL-N_01_12 Figure 15.2 Read Operation Timings t RC Addresses Stable t ACC OEH t CE HIGH Z Figure 15.3 Page Read Timings Same Page Aa t PACC t ACC Qa ® S29GL-N MirrorBit Flash Family HIGH Z Output Valid PACC PACC ...
Page 66
... Note) Figure 15.4 Reset Timings Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready for more information. ® S29GL-N MirrorBit Flash Family All Speed Options Unit μs Max 20 Max 500 ns Min 500 ns Min 50 ns Min 20 µs Min ...
Page 67
... For 1–16 words/1–32 bytes programmed. October 29, 2008 S29GL-N_01_12 Table 15.3 Erase and Program Operations Description (Note 1) (Note 2) (Note 2) (Note 2) (Note 1) (Note 1) for more information. ® S29GL-N MirrorBit Flash Family Speed Options 90 110 Unit Min 90 110 ns Min 0 ns Min 15 ns Min ...
Page 68
... Figure 15.5 Program Operation Timings WPH A0h t BUSY is the true data at the program address. OUT Figure 15.6 Accelerated Program Timing Diagram t t VHH VHH ® S29GL-N MirrorBit Flash Family Read Status Data (last two cycles WHWH1 D Status OUT VHH VHH S29GL-N_01_12 October 29, 2008 IH IH ...
Page 69
... WPH 55h 30h 10 for Chip Erase t BUSY Write Operation Status on page Complement Complement Status Data Status Data ® S29GL-N MirrorBit Flash Family Read Status Data WHWH2 In Complete Progress t RB 55.) VA High Z Valid Data True High Z True Valid Data 69 ...
Page 70
... Valid Status Status (first read) (second read) Figure 15.10 DQ2 vs. DQ6 Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program ® S29GL-N MirrorBit Flash Family Valid Valid Data Status (stops toggling) Erase Resume Erase Erase Complete Read S29GL-N_01_12 October 29, 2008 ...
Page 71
... Not 100% tested. 2. See the Erase And Programming Performance on page 73 3. For 1–16 words/1–32 bytes programmed. October 29, 2008 S29GL-N_01_12 Description (Note 1) (Note 2) (Note 2) (Note 2) for more information. ® S29GL-N MirrorBit Flash Family Speed Options 90 110 Unit Min 90 110 ns Min 0 ns Min 45 ns ...
Page 72
... Figure indicates last two bus cycles of a program or erase operation program address sector address program data. 3. DQ7# is the complement of the data written to the device Illustration shows device in word mode for program buffer to flash PBA for program 2AA for erase SA for sector erase 555 for chip erase t t ...
Page 73
... CC , 100,000 cycles. CC Test Setup OUT ® S29GL-N MirrorBit Flash Family Max (Note 2) Unit Comments 3.5 Excludes 00h programming prior 64 sec to erasure 128 (Note 6) µs Excludes system level overhead (Note 7) sec Table 10.1 on page 51 and Table 10.3 ...
Page 74
... LEAD COPLANARITY SHALL BE WITHIN 0.10MM (0.004") AS MEASURED FROM THE SEATING PLANE. R 0.08 0.20 9 DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS GAGE LINE 0.25MM (0.0098") BSC DETAIL B ® S29GL-N MirrorBit Flash Family A2 0. SEATING PLANE 0.08MM (0.0031" A WITH PLATING ( BASE METAL SECTION B-B e/2 ...
Page 75
... DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS October 29, 2008 S29GL-N_01_12 0.10 2X (N/2 TIPS) 2X 0.10 0. SEATING A PLANE 0.08MM (c) 7 SECTION B-B R (c) GAUGE PLANE 0.25MM (0.0098") BSC C L ® S29GL-N MirrorBit Flash Family REVERSE PIN OUT (TOP VIEW (0.0031" WITH PLATING c1 b1 BASE METAL e DETAIL B 3356 \ 16-038.10c ...
Page 76
... WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN BALL PITCH THE OUTER ROW e/2 SOLDER BALL PLACEMENT 8. NOT USED. DEPOPULATED SOLDER BALLS 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. ® S29GL-N MirrorBit Flash Family ...
Page 77
... BALL DIAMETER WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN BALL PITCH - D DIRECTION THE OUTER ROW e/2 BALL PITCH - E DIRECTION 8. NOT USED. SOLDER BALL PLACEMENT 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED DEPOPULATED SOLDER BALLS BALLS. ® S29GL-N MirrorBit Flash Family 3354 \ 16-038.12d 77 ...
Page 78
... BALL PITCH - E DIRECTION 0.50 BSC. SOLDER BALL PLACEMENT NONE DEPOPULATED SOLDER BALLS ® S29GL-N MirrorBit Flash Family NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. 3. BALL POSITION DESIGNATION PER JESD 95-1, SPP-010 EXCEPT AS NOTED REPRESENTS THE SOLDER BALL GRID PITCH. ...
Page 79
... Removed note 4 Alternate CE# Controlled Erase and Removed note 4 Program Operations Global Corrected minor typos AC Characteristics Updated Data#Polling Timing October 29, 2008 S29GL-N_01_12 Description range and replaced 90 ns with 110 ns for low V CC from from from CPH ® S29GL-N MirrorBit Flash Family option IO 79 ...
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... Changed Note 1 in Table DC Characteristics- CMOS Compatible Ordering Information Added LAE064 package option Connection Diagram Figure 3.3; Title changed to 64ball Fortified BGA Physical Dimensions Added LAE064 package option Revision 12 (October 29, 2008) Ordering Information Updated Valid Combinations Table Description ® S29GL-N MirrorBit Flash Family S29GL-N_01_12 October 29, 2008 ...
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... Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2007-2008 Spansion Inc. All rights reserved. Spansion ™ ™ ...