AT45DB321D-SU SL383 Atmel, AT45DB321D-SU SL383 Datasheet - Page 2
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AT45DB321D-SU SL383
Manufacturer Part Number
AT45DB321D-SU SL383
Description
Manufacturer
Atmel
Datasheet
1.AT45DB321D-SU_SL383.pdf
(54 pages)
Specifications of AT45DB321D-SU SL383
Density
32Mb
Access Time (max)
6ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC EIAJ
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
15mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Compliant
2. Pin Configurations and Pinouts
2
Figure 2-1.
Note:
Figure 2-3.
Note:
1. The metal pad on the bottom of the MLF
1. See AT45DCB004D Datasheet.
AT45DB321D
RESET
package is floating. This pad can be a “No
Connect” or connected to GND.
SCK
CS
SI
MLF
DataFlash Card
Top View through Package
7 6
1
2
3
4
(1)
5 4 3 2 1
(VDFN) Top View
sequentially access its data. The simple sequential access dramatically reduces active pin
count, facilitates hardware layout, increases system reliability, minimizes switching noise, and
reduces package size. The device is optimized for use in many commercial and industrial appli-
cations where high-density, low-pin count, low-voltage and low-power are essential.
To allow for simple in-system reprogrammability, the AT45DB321D does not require high input
voltages for programming. The device operates from a single power supply, 2.7V to 3.6V, for
both the program and read operations. The AT45DB321D is enabled through the chip select pin
(CS) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Output
(SO), and the Serial Clock (SCK).
All programming and erase cycles are self-timed.
(1)
8
7
6
5
SO
GND
VCC
WP
Figure 2-2.
Figure 2-4.
Note:
RDY/BUSY
RESET
GND
VCC
SCK
WP
NC
NC
NC
NC
NC
CS
SO
SI
TSOP package is not recommended for new designs. Future die
shrinks will support 8-pin packages only.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SOIC Top View
TSOP Top View: Type 1
RESET
SCK
CS
SI
1
2
3
4
8
7
6
5
SO
GND
VCC
WP
3597M–DFLASH–3/09
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC