M38510/20302BEA QP SEMICONDUCTOR, M38510/20302BEA Datasheet - Page 25

• Manufacturer Part Number: M38510/20302BEA
• Manufacturer: QP SEMICONDUCTOR

Specifications of M38510/20302BEA

• Lead Free Status / RoHS Status: Not Compliant

procedures shall be used for programming the device:
4.9 Programming procedures for circuit C. The programming characteristics in table IVC and the following
4.8 Programming procedure for circuit B. The programming characteristics in table IVB and the following
procedures shall be used for programming the device:
a. Connect the device in the electrical configuration for programming. The waveforms on figure 5b and
b. Raise V
d. Disable the chip by applying V
e. Apply the V
f. Apply the V
g. Other bits in the same word may be programmed sequentially by applying VOUT pulses to each output to
h. Repeat steps 4.8b through 4.8g for all other bits to be programmed.
i.
j.
a. Connect the device in the electrical configuration for programming. The waveforms on the figure 5c and
b. Terminate all device outputs with a 10 kΩ resistor to V
c. Address the PROM with the binary address of the selected word to be programmed.
d. After a t
e. After a t
f. After a t
g. Other bits in the same word may be programmed sequentially while the V
h. Repeat steps 4.9b through 4.9g for all other bits to be programmed.
c. Address the PROM with the binary address of the selected word to be programmed. Address inputs are
the programming characteristics of table IVB shall apply to these procedures.
increasing the voltage on the output pin, the program pin’s voltage pulse shall precede the output pin’s
programming pulse by T
outputs shall be programmed one output at a time, since internal decoding circuitry is capable of sinking
only one unit of programming current at a time. Note that the PROM is supplied with fuses generating a
high level logic output. Programming a fuse will cause the output to go to a low level logic in the verify
mode.
the programming characteristics of table IVC shall apply to these procedures.
time.
cause the output to go to a high-level logic in the verify mode.
applying V
figure 5c.
Enable the chip by applying V
If any bit does not verify as programmed it shall be considered a programming reject.
TTL compatible.
Raise V
be programmed.
low output by requiring the device to sink 12 mA at V
CC
D
D
D
CC
delay (10μs), apply V
delay (10μs), pulse
delay (10μs), remove the V
OUT
to 5.5 V.
to V
PP
OUT
pulse to the programming pin (
pulses to each output to be programmed allowing a delay of t
pulse with duration of t
CCP
= 8.75 ± 0.25 V.
D1
and leave after the output pins programming pulse by T
CE and
IL
IH
OUT
to the
to
1
= +17 ± 1 V to the output to be programmed. Program one output at a
CE
OUT
P
2
CE and
MIL-M-38510/203E
to the output selected for programming (see table IVB). The
CE
pulse from the programmed output. Programming a fuse will
and
1
2
CE ). In order to insure that the output transistor is off before
CE inputs.
inputs to logic “0” for a duration of t
25
1
CE
1
2
CC
CC
and verify the program. Verification may check for a
.
= 4.0 V and 0.2 mA at V
CE and
1
CE
2
CC
inputs are TTL compatible.
D
input is at the V
between pulses as shown on
CC
P
D2
(1 to 2 ms).
= 7.0 V at T
(see figure 5b).
CCP
C
level by
= +25°C.