W9751G6JB-3 Winbond, W9751G6JB-3 Datasheet - Page 52

no-image

W9751G6JB-3

Manufacturer Part Number
W9751G6JB-3
Description
Manufacturer
Winbond
Type
DDR2 SDRAMr
Datasheet

Specifications of W9751G6JB-3

Organization
32Mx16
Density
512Mb
Address Bus
14b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
WBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
150mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W9751G6JB-3
Manufacturer:
Winbond
Quantity:
2 596
Part Number:
W9751G6JB-3
Manufacturer:
WINBOND
Quantity:
1 000
Part Number:
W9751G6JB-3
Manufacturer:
WINBOND
Quantity:
8 000
Part Number:
W9751G6JB-3
Manufacturer:
WINBOND/华邦
Quantity:
20 000
- tJIT(duty)
- tJIT(per), tJIT(per,lck)
- tJIT(cc), tJIT(cc,lck)
- tERR(2per), tERR (3per), tERR (4per), tERR (5per), tERR (6-10per) and tERR (11-50per)
tJIT(duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of any single tCH from
tCH(avg). tCL jitter is the largest deviation of any single tCL from tCL(avg).
tJIT(duty) = Min/max of {tJIT(CH), tJIT(CL)}
where,
tJIT(CH) = {tCHi- tCH(avg) where i=1 to 200}
tJIT(CL) = {tCLi- tCL(avg) where i=1 to 200}
tJIT(per) is defined as the largest deviation of any single tCK from tCK(avg).
tJIT(per) = Min/max of {tCKi- tCK(avg) where i=1 to 200}
tJIT(per) defines the single period jitter when the DLL is already locked.
tJIT(per,lck) uses the same definition for single period jitter, during the DLL locking period only.
tJIT(per) and tJIT(per,lck) are not guaranteed through final production testing.
tJIT(cc) is defined as the difference in clock period between two consecutive clock cycles:
tJIT(cc) = Max of |tCKi+1 – tCKi|
tJIT(cc) defines the cycle to cycle jitter when the DLL is already locked.
tJIT(cc,lck) uses the same definition for cycle to cycle jitter, during the DLL locking period only.
tJIT(cc) and tJIT(cc,lck) are not guaranteed through final production testing.
tERR is defined as the cumulative error across multiple consecutive cycles from tCK(avg).
Where
tERR(nper) =
11
6
n
n
n
n
n
n
=
=
=
=
3
5
2
4
50
i
10
+
j
n
=
1
1
tCK
- 52 -
for tER
for tER
for tER
for tER
for tER
for tER
j
–n × tCK(avg)
R(3per)
R(11
R(5per)
R(2per)
R(4per)
R(6
Publication Release Date: Jun. 18, 2010
10per)
50per)
W9751G6JB
Revision A03

Related parts for W9751G6JB-3