MT49H32M9BM-25 Micron Technology Inc, MT49H32M9BM-25 Datasheet - Page 60

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MT49H32M9BM-25

Manufacturer Part Number
MT49H32M9BM-25
Description
Manufacturer
Micron Technology Inc
Type
RLDRAMr
Datasheet

Specifications of MT49H32M9BM-25

Organization
32Mx9
Density
288Mb
Address Bus
22b
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
1.8V
Package Type
uBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
779mA
Pin Count
144
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT49H32M9BM-25
Manufacturer:
MICRON/美光
Quantity:
20 000
Part Number:
MT49H32M9BM-25:B
Manufacturer:
MICRON/美光
Quantity:
20 000
Company:
Part Number:
MT49H32M9BM-25:B
Quantity:
260
Figure 37:
PDF: 09005aef80a41b59/Source: 09005aef809f284b
288Mb_RLDRAM_II_CIO.Core.fm - Rev B 5/08 EN
Mode Register Definition in Multiplexed Address Mode
Notes:
M8
0
1
1. Bits A10–A18 must be set to zero.
2. BL = 8 is not available.
3. ±30 percent temperature variation.
4. DLL RESET turns the DLL off.
5. Ay8 not used in MRS.
6. Available only in 576Mb device.
7. BA0–BA2 are “Don’t Care.”
8. Addresses A0, A3, A4, A5, A8, and A9 must be set as shown in order to activate the mode
Internal 50Ω 3 (default)
Drive Impedance
register in the multiplexed address mode.
External (ZQ)
288Mb: x9, x18, x36 2.5V V
M9
0
1
Ax
Ay
On-Die Termination
Reserved 1
A18
A18
Off (default)
18–10
M7
On
. . .
. . .
0
1
M5
0
1
A10
A10
DLL reset 4 (default)
ODT
DLL enabled
9
A9
DLL Reset
Nonmultiplexed (default)
IM
8
A8
DLL NA 5
Address MUX
Multiplexed
7
A9
59
6
A8
AM
5
A5
4
A4
BL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
3
A3
M2
0
0
0
0
1
1
1
1
EXT
2
A4
Config
M4
M1
0
0
1
1
0
0
1
1
0
0
1
1
1
A3
, 1.8V V
M3
M0
0
1
0
1
0
1
0
1
0
1
0
1
0
A0
Burst Length
Configuration
2 (default)
1 2 (default)
Reserved
Reserved
Reserved
Mode Register (Mx)
4 2,6
4
8
1 2
5 6
2
3
DD
, HSTL, CIO, RLDRAM II
©2003 Micron Technology, Inc. All rights reserved.
Operations

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