K4S281632K-UC75T00 Samsung Semiconductor, K4S281632K-UC75T00 Datasheet - Page 12

• Manufacturer Part Number: K4S281632K-UC75T00
• Manufacturer: Samsung Semiconductor
• Type: SDRAMr

Specifications of K4S281632K-UC75T00

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 140mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

15.0 AC Characteristics
16.0 DQ Buffer Output Drive Characteristics
K4S280832K
K4S281632K
Notes :
CLK cycle time
CLK to valid
output delay
Output data
hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
Notes :
Output rise time
Output fall time
Output rise time
Output fall time
Parameter
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
4. tSS applies for address setup time, clock enable setup time, commend setup time and data setup time
1. Rise time specification based on 0pF + 50 Ω to V
2. Fall time specification based on 0pF + 50 Ω to V
3. Measured into 50pF only, use these values to characterize to.
4. All measurements done with respect to V
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
tSH applies for address holde time, clock enable hold time, commend hold time and data hold time
Parameter
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
Symbol
trh
trh
tfh
tfh
Measure in linear
region : 1.2V ~ 1.8V
Measure in linear
region : 1.2V ~ 1.8V
Measure in linear
region : 1.2V ~ 1.8V
Measure in linear
region : 1.2V ~ 1.8V
SS
Condition
Symbol
.
tSAC
tSHZ
tSLZ
tCC
tOH
tCH
tCL
tSS
tSH
DD
SS
, use these values to design to.
, use these values to design to.
12 of 15
Min
1.5
2
2
1
5
2
1
-
-
-
-
-
-
50 (x16 only)
1.37
1.30
Min
2.8
2.0
1000
Max
4.5
4.5
-
-
-
-
-
-
-
-
-
Typ
3.9
2.9
(AC operating conditions unless otherwise noted)
Min
2.5
2.5
2.5
1.5
6
1
1
-
-
60 (x16 only)
Synchronous DRAM
Max
4.37
3.8
5.6
5.0
Rev. 1.23 March 2009
1000
Max
5
5
-
-
Volts/ns
Volts/ns
Volts/ns
Volts/ns
Unit
Min
7.5
2.5
0.8
2.5
1.5
10
3
3
1
75
Notes
1000
Max
1,2
1,2
5.4
5.4
3
3
6
6