MT48LC8M16A2P-7E:G Micron Technology Inc, MT48LC8M16A2P-7E:G Datasheet - Page 70

• Manufacturer Part Number: MT48LC8M16A2P-7E:G
• Description: IC, SDRAM 128MB, SMD, 48LC8, TSOP54
• Manufacturer: Micron Technology Inc
• Type: SDRAMr
• Series: -r

Specifications of MT48LC8M16A2P-7E:G

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 5.4ns
• Maximum Clock Rate: 143MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 165mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Access Time: RoHS Compliant
• Memory Case Style: TSOP
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Operating Temperature Max: 70°C
• Operating Temperature Min: 0°C
• Package / Case: TSOP
• Memory Type: SDRAM
• Memory Configuration: 4 BLK (2M X 16)
• Interface Type: LVTTL
• Rohs Compliant: Yes
• Format - Memory: RAM
• Memory Size: 128M (8Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / RoHS Status: Compliant
• Lead Free Status / RoHS Status: Compliant

Figure 54:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
COMMAND
A0–A9, A11
BA0, BA1
DQM /
CKE
A10
CLK
DQ
WRITE – Full-Page Burst
t CKS
t CMS
t AS
t AS
t AS
Notes:
ACTIVE
BANK
T0
ROW
ROW
t CKH
t CMH
t AH
t AH
t AH
t RCD
1. x16: A9 and A11 = “Don’t Care.”
2.
3. Page left open; no
t CL
x8: A11 = “Don’t Care.”
t
WR must be satisfied prior to PRECHARGE command.
T1
NOP
t CH
t CMS
t CK
t DS
COLUMN m 1
D
T2
WRITE
BANK
IN
t CMH
m
t DH
t
RP.
t DS
D
IN
T3
NOP
m + 1
t DH
70
1,024 (x8) locations within same row
2,048 (x4) locations within same row
512 (x16) locations within same row
t DS
D
IN
T4
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Full page completed
t DS
D
IN
T5
NOP
m + 3
t DH
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128Mb: x4, x8, x16 SDRAM
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t DS
D
Tn + 1
IN
NOP
m - 1
t DH
©1999 Micron Technology, Inc. All rights reserved.
Full-page burst does not
self-terminate. Can use
BURST TERMINATE
command to stop.
Timing Diagrams
BURST TERM
Tn + 2
DON’T CARE
2, 3
Tn + 3
NOP