M36W0R6040T0ZAQ STMicroelectronics, M36W0R6040T0ZAQ Datasheet - Page 4
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M36W0R6040T0ZAQ
Manufacturer Part Number
M36W0R6040T0ZAQ
Description
Manufacturer
STMicroelectronics
Datasheet
1.M36W0R6040T0ZAQ.pdf
(18 pages)
Specifications of M36W0R6040T0ZAQ
Operating Supply Voltage (max)
1.95V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M36W0R6040T0ZAQ
Manufacturer:
ST
Quantity:
20 000
M36W0R6040T0, M36W0R6040B0
SUMMARY DESCRIPTION
The M36W0R6040T0 and M36W0R6040B0 are
Multiple Memory Products which combine two
memory devices; a 64-Mbit, Multiple Bank Flash
memories, the M58WR064FT/B, and a 16-Mbit
Pseudo SRAM, the M69AR024B. Recommended
operating conditions do not allow more than one
memory to be active at the same time.
The memory is offered in a Stacked TFBGA88
(8x10mm, 8x10 ball array, 0.8mm pitch) package.
In addition to the standard version, the packages
are also available in Lead-free version, in compli-
ance with JEDEC Std J-STD-020B, the ST ECO-
PACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive.
All packages are compliant with Lead-free solder-
ing processes.
The memory is supplied with all the bits erased
(set to ‘1’).
Figure 2. Logic Diagram
4/18
A0-A21
WP
RP
UB
W
E1
E2
LB
G
E
G
W
L
K
F
F
F
F
F
F
F
P
P
P
P
P
P
22
V
DDF
M36W0R6040T
M36W0R6040B
V
DDQ
V SS
V
PPF
V
DDP
16
DQ0-DQ15
WAIT
AI08448
F
Table 1. Signal Names
A0-A19
DQ0-DQ15
V
V
V
V
V
NC
DU
Flash Memory Control Functions
A21-A20
L
E
G
W
RP
WP
K
WAIT
PSRAM control functions
E1
G
W
E2
UB
LB
F
DDF
DDQ
PPF
SS
DDP
F
F
F
P
F
P
P
P
P
F
P
F
F
Common Address Inputs
Common Data Input/Output
Flash Memory Power Supply
Common Flash and PSRAM Power
Supply for I/O Buffers
Common Flash Optional Supply
Voltage for Fast Program & Erase
Ground
PSRAM Power Supply
Not Connected Internally
Do Not Use as Internally Connected
Address Inputs for the Flash memory
only
Latch Enable input
Chip Enable input
Output Enable input
Write Enable input
Reset input
Write Protect input
Burst Clock
Wait Data in Burst Mode
Chip Enable input
Output Enable input
Write Enable input
Power-down input
Upper Byte Enable input
Lower Byte Enable input