E6420BBG Semtech, E6420BBG Datasheet - Page 25

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E6420BBG

Manufacturer Part Number
E6420BBG
Description
Manufacturer
Semtech
Datasheet

Specifications of E6420BBG

Lead Free Status / RoHS Status
Not Compliant
Test conditions (unless otherwise specified): "Recommended Operating
Conditions".
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
AC Characteristics
HIGH-PERFORMANCE PRODUCTS – ATE
D
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2000 Semtech Corp.
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Not production tested. Guaranteed by design and
characterization.
The max spec of 70% of T
CK24 refers to 24th rising clock edge, which corresponds
to a full shift register. Note that a falling CK24 edge is also
required for proper operation of circuit.
The 6420 is production tested at 55 MHz only, with 50%
duty cycle.
Duty cycle % shown refers to “high” duration of clock
in a period.
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is not production tested.
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5
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L H
L H
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F x a
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_ D
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T
_ U
_ U
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m
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_ D
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s
U
U
b
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K
T D
I D
l o
E
T D
T E
25
M
1
1
1
1
3
2
5
3
3
5
5
2
Figure 8. Shift Register Loading Timing Diagram
n i
0
0
0
0
3
0
5
5
0
Figure 9. Central and Individual DAC Updating
SDI
CK
UPDATE
0
CK
CE
2
2
T SU_SDI
T
.
4
5
3
5
5
2
4
5
3
y
.
0
0
0
3
9
1
4
p
0
0
Valid Data
0
T HLD_SDI
A0
CK1
CK1
T CK
7
7
T SU_UPDATE
0
0
%
%
M
7
1
1
5
7
7
1
5
T SU_CE
0
5
1
0
0
a
f o
f o
0
0
0
0
0
0
0
0
T HLD_CE
T HLD_UPDATE
x
T SU_SDI
CK24
T
T
C
C
K
K
Edge6420
Valid Data
T HLD_SDI
CK24
D15
Note: A 24th falling
CK edge is required for
DAC updating!
www .semtech.com
U
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M
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µ
µ
µ
µ
µ
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%
H
H
H
H
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s
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