E6420BBG Semtech, E6420BBG Datasheet - Page 14

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E6420BBG

Manufacturer Part Number
E6420BBG
Description
Manufacturer
Semtech
Datasheet

Specifications of E6420BBG

Lead Free Status / RoHS Status
Not Compliant
Current Outputs
The TEST_MODE and SCAN_OUT pins on the Edge6420
are used in the same way as for voltage outputs. The
scan circuits for current outputs are shown in Figure 6.
The voltage measured at the SCAN_OUT pin, using the
configuration in Figure 6, for Group E and F current outputs
are as follows:
HIGH-PERFORMANCE PRODUCTS – ATE
Circuit Description (continued)
TEST_MODE
2000 Semtech Corp.
SCAN_OUT
V
V
SCAN_OUT_F
SCAN_OUT_E
ADDRESS
DECODER
where:
R
R
where:
R
R
SENSE_E
PAD
SENSE_F
PAD
= (R
= (R
= 30
= 30
IDAC
SENSE_E
SENSE_F
= 400
= 400
and
30%
30%
+
NOTE: WHEN ADDRESS 64 IS INVOKED (PARALLEL LOAD), SCAN IS DISABLED.
+ R
+ R
PAD
30%
30%
Figure 6. Current Output Scan Circuits
PAD
) * I
) * I
R
SENSE
IDAC
OUT_E
OUT_F
R
PAD
14
+
IOUT_CH0_0
The typical "ON" resistance of the FET switch is 100 k ,
but can vary from 60 k to 180 k as a function of process
and output voltage.
Notes when Using SCAN Feature with Multiple Chips
When multiple 6420s are used on a board, and it is desired
to gang the SCAN_OUT pins of these 6420s, or gang the
TEST_MODE inputs to one point, it is required for proper
functioning that the following rules be followed:
1)
2)
R
If TEST_MODE inputs are ganged together,
SCAN_OUT cannot be ganged, or invalid results
will be observed at the SCAN_OUT pin. Hence,
each SCAN_OUT pin on a 6420 will have to be
measured separately.
If SCAN_OUT is ganged, TEST_MODE pins cannot
be ganged together.
SENSE
VIRTUAL GROUND
IDAC
CONNECT TO
R
PAD
+
IOUT_CH0_1
R
VIRTUAL GROUND
SENSE
CONNECT TO
R
PAD
Edge6420
IOUT_CH0_2
www .semtech.com
VIRTUAL GROUND
CONNECT TO

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