TS86101G2BCGL E2V, TS86101G2BCGL Datasheet - Page 42

• Manufacturer Part Number: TS86101G2BCGL
• Manufacturer: E2V

Specifications of TS86101G2BCGL

• Lead Free Status / RoHS Status: Not Compliant

42
0992D–BDC–04/09
Figure 12-10. DSP Output Clock Implementation (General Case – Values Given For Information Only)
Notes:
1. The 100Ω differential resistor is required for impedance matching of the output buffer of the MUXDAC. It
2. The 100Ω differential resistor, the AC coupling capacitors and the resistors used for the biasing should
3. Even without 100Ω differential resistor, the impedance of the output buffer is sufficient. In that case the
DGND
VCCD
50Ω
must be placed right after the MUXDAC buffer and not at the end of the line (i.e. close to the load)
because of the biasing resistors used after the AC coupling capacitors (it would change the biasing).
all be placed as close as possible to the load.
swing of DSP output clock is twice larger and common mode remains unchanged.
50Ω Lines
DSP_CK_T
DSP_CK_F
100Ω
1.5V
As close as possible to the load
10 nF
10 nF
1 KΩ
GND
3.3V
10 nF
100 KΩ
e2v semiconductors SAS 2009
TS86101G2B
Load
High Impedence