ADRF6510ACPZ-WP Analog Devices Inc, ADRF6510ACPZ-WP Datasheet - Page 16

• Manufacturer Part Number: ADRF6510ACPZ-WP
• Manufacturer: Analog Devices Inc

Specifications of ADRF6510ACPZ-WP

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Supplier Unconfirmed

ADRF6510
PROGRAMMING THE FILTERS
The 0.5 dB corner frequencies for both filters are programmed
simultaneously through the SPI port. A 5-bit register stores the
codes for corner frequencies of 1 MHz through 30 MHz (see
Table 4). The SPI protocol not only allows frequency codes to
be written to the DATA pin but also allows the stored code to
be read back from the SDO pin.
The latch enable (LE) pin must first go to a Logic 0 for a read or
write cycle to begin. On the next rising edge of the clock (CLK),
a Logic 1 on the DATA pin initiates a write cycle, whereas a
Logic 0 on the DATA pin initiates a read cycle. In a write cycle,
the next five CLK rising edges latch the frequency code, LSB
first. When LE goes high, the write cycle is completed and the
frequency code is presented to the filter. In a read cycle, the next
five CLK falling edges present the stored frequency code, LSB
first. When LE goes high, the read cycle is completed. Detailed
timing diagrams are shown in Figure 2 and Figure 3.
Table 4. Frequency Code vs. Corner Frequency Lookup Table
5-Bit Binary Frequency Code
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
1
MSB first.
1
Corner Frequency (MHz)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
30
30
Rev. 0 | Page 16 of 28
NOISE CHARACTERISTICS
The output noise behavior of the ADRF6510 depends on the gain
and bandwidth settings. Both the filter sections and the VGAs
contribute to the total noise at the output. The filter contributes
a noise spectral density profile that is flat at low frequencies, peaks
near the corner frequency, and then rolls off as the filter poles
roll off the gain. The magnitude of the noise spectral density,
expressed in nV/√Hz, varies inversely with the square root of
the bandwidth setting, resulting in a total integrated noise in
nV that is nearly constant with bandwidth setting.
The X-AMP type VGAs used in the ADRF6510 contribute
a fixed noise spectral density to the output, independent of
the gain setting, of −130 dBV/√Hz, which is equivalent to
316 nV/√Hz. Although the VGA noise contribution to the
output is fixed, the gain of the VGA controls the relative
contribution of the filter noise.
Figure 46 and Figure 47 show the total output noise spectral
density vs. frequency for different bandwidth settings. At low
values of VGA gain, the noise at the output is the flat spectral
density contributed by the VGA because the filter noise is sup-
pressed by the VGA attenuation. As the gain increases, more
of the filter noise appears at the output. Because the filter noise
increases at lower bandwidth settings, it overwhelms the VGA
noise floor. In either case, the noise density asymptotically
approaches the −130 dBV/√Hz limit set by the VGA at the
highest frequencies. For other values of VGA gain and band-
width setting, the detailed shape of the noise spectral density
changes.
–115
–120
–125
–130
–135
Figure 46. Total Output Noise with a 20 MHz Corner Frequency
10
15
20
for Three Different Gain Settings
GAIN = 20dB
25
GAIN = 40dB
FREQUENCY (MHz)
30
GAIN = 0dB
35
40
BANDWIDTH = 20MHz
45
50
55
60