ADRF6510ACPZ-WP Analog Devices Inc, ADRF6510ACPZ-WP Datasheet - Page 15

• Manufacturer Part Number: ADRF6510ACPZ-WP
• Manufacturer: Analog Devices Inc

Specifications of ADRF6510ACPZ-WP

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Supplier Unconfirmed

The corner frequency of the filters is defined by RC products,
which can vary by ±30% in a typical process. Therefore, all the
parts are factory calibrated for corner frequency, resulting in
a residual ±10% corner frequency variation over the −40°C to
+85°C temperature range. Although absolute accuracy requires
calibration, the matching of RC products between the pair of
channels is better than 1% by observing careful design and
layout practices. Calibration and excellent matching ensure
that the magnitude and group delay responses of both channels
track together, a critical requirement for digital IQ-based
communication systems.
VARIABLE GAIN AMPLIFIERS (VGAs)
The VGAs are implemented using the Analog Devices, Inc.,
patented X-AMP® architecture, consisting of a tapped 50 dB
attenuator followed by a fixed-gain amplifier. The X-AMP archi-
tecture generates a linear-in-dB monotonic gain response with
low ripple. The gain is controlled through the high impedance
GAIN pin with an accurate slope of 30 mV/dB. The gain response
shown in Figure 44 shows the GAIN pin voltage range and the
absence of gain foldback at high V
OUTPUT BUFFERS/ADC DRIVERS
The low impedance (20 Ω) output buffers of the ADRF6510 are
designed to drive either ADC inputs or subsequent amplifier stages.
They are capable of delivering up to 4 V p-p composite two-tone
signals into 500 Ω differential loads with >60 dBc IM3. The
output common-mode voltage defaults to VPS/2, but it can be
adjusted from 1.5 V to 3.0 V without loss of drive capability by
presenting the VOCM pin with the desired common-mode
voltage. The high input impedance of VOCM allows the ADC
reference output to be connected directly. Even though the
signal path is fully dc-coupled and the dc offset compensation
loop can remove undesired dc offsets (see the DC Offset
Compensation Loop section), the output buffers can be ac-
coupled to the next stage by properly selecting the coupling
capacitors according to the load impedance.
–10
50
40
30
20
10
Figure 44. Linear-in-dB Gain Control Response of the X-Amp VGA
0
0
0.5
Showing Consistent Slope and Low Error
1.0
30mV/dB
1.5
V
GAIN
2.0
(V)
GAIN
2.5
.
3.0
3.5
4.0
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
Rev. 0 | Page 15 of 28
DC OFFSET COMPENSATION LOOP
In many signal processing applications, no information is
carried in the dc level. In fact, dc voltages and other low
frequency disturbances can often dominate the intended signal
and consume precious dynamic range in the analog path and
bits in the data converters. These dc voltages can be present
with the desired input signal or can be generated inside the
signal path by inherent dc offsets or other unintended signal-
dependent processes such as self-mixing or rectification.
Because the ADRF6510 is fully dc-coupled, it may be necessary
to remove these offsets to realize the maximum signal-to-noise
ratio (SNR). This can be achieved with ac-coupling capacitors
at the input and output pins, but that would require large values
because the impedances are fairly low, and high-pass corners
may need to be <10 Hz in some cases. To address the issue of dc
offsets, the ADRF6510 provides an offset correction loop that
nulls the output differential dc level as shown in Figure 45. If
the correction loop is not required, it can be disabled through
the OFDS pin.
The offset control loop creates a high-pass corner, f
is superimposed on the normal Butterworth filter response.
Typically, f
programmed filter bandwidth so that there is no interaction
between them. Setting f
C
correction loop works around the VGA section, f
dependent on the gain of the VGA. In general, the expression
for f
where:
Gain is expressed in linear terms, not in decibels (dB).
C
Note that f
reason, C
to guarantee that f
required by the system.
OFS
OFS
FILTERS
FROM
, from the OFS1 and OFS2 pins to ground. Because the
HP
is expressed in microfarads (μF).
f
HP
Figure 45. Offset Compensation Loop Operates Around the VGA
is given by
(Hz) = 1.2 × (Gain/C
OFS
HP
HP
should be chosen at the highest operating gain
increases in proportion to the gain. For this
is many orders of magnitude lower than the lower
OFDS
HP
GAIN
is always below the maximum limit
50dB
VGA
HP
and Output Buffer
C
is accomplished with capacitors,
OFS
OFS
)
OFSx
OUTPUT ADC
DRIVER
ADRF6510
HP
BASEBAND
OUTPUT
HP
is also
, that