LFE2M50E-5F484C LATTICE SEMICONDUCTOR, LFE2M50E-5F484C Datasheet - Page 117
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LFE2M50E-5F484C
Manufacturer Part Number
LFE2M50E-5F484C
Description
FPGA LatticeECP2M Family 48000 Cells 90nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2M50E-5F484C
Package
484FBGA
Family Name
LatticeECP2M
Device Logic Units
48000
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
270
Ram Bits
4246528
In System Programmability
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M50E-5F484C
Manufacturer:
LATTICE
Quantity:
301
Company:
Part Number:
LFE2M50E-5F484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LatticeECP2M Pin Information Summary, LFE2M50, LFE2M70 and LFE2M100
(Cont.)
Lattice Semiconductor
Available DDR-Interfaces
per I/O Bank
PCI Capable I/Os per Bank
1. Minimum requirement to implement a fully functional 8-bit wide DDR bus. Available DDR interface consists of at least 12 I/Os (1 DQS + 1
DQSB + 8 DQs + 1 DM + Bank VREF1).
1
Pin Type
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
484 fpBGA 672 fpBGA 900 fpBGA 900 fpBGA 1152 fpBGA 900 fpBGA 1152 fpBGA
50
60
52
60
0
0
2
2
3
2
1
3
0
0
0
0
0
0
LFE2M50
4-14
24
60
54
60
0
0
2
1
1
3
2
3
0
0
0
0
0
0
48
50
60
68
0
0
2
1
3
3
2
3
0
0
0
0
0
0
LatticeECP2/M Family Data Sheet
48
40
62
70
0
0
4
3
3
2
3
4
0
0
0
0
0
0
LFE2M70
72
64
40
40
66
74
0
0
4
4
3
3
4
4
0
0
0
0
Pinout Information
48
40
62
70
0
0
4
3
3
2
3
4
0
0
0
0
0
0
LFE2M100
80
80
44
46
82
90
0
0
4
5
3
3
5
5
0
0
0
0
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