USB3300-EZK Standard Microsystems (SMSC), USB3300-EZK Datasheet
USB3300-EZK
Specifications of USB3300-EZK
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USB3300-EZK Summary of contents
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... Industrial Operating Temperature -40°C to +85°C 32 pin, QFN Lead-Free RoHS Compliant package ( 0.90 mm height) Applications The USB3300 is the ideal companion to any ASIC, SoC or FPGA solution designed with a ULPI Hi-Speed USB host, peripheral or OTG core. The USB3300 is well suited for: Cell Phones ...
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... USB3300-EZK for 32 pin, QFN Lead-Free RoHS Compliant Package USB3300-EZK-TR for 32 pin, QFN Lead-Free RoHS Compliant Package (tape and reel) 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given ...
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... The ULPI interface consists of 12 interface pins; 8 bi-directional data pins, 3 control pins, and a 60 MHz clock. By using the 12 pin ULPI interface the USB3300 is able to provide support for the full range of UTMI+ Level 3 through Level 0, as shown in Figure 2, "ULPI Interface Features as Related to UTMI+" ...
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... Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface ULPI Go devices with 12 pin interface (HS, FS, LS, preamble packet) UTMI+ Level 3 the-Go devices (HS, FS, LS, preamble packet) UTMI+ Level 2 the-Go devices UTMI+ Level 1 and On-the-Go devices (HS and FS Only) UTMI+ Level 0 Hi-Speed Peripherals Only 4 PRODUCT PREVIEW USB3300 USB3500 USB3450 USB3280 USB3250 SMSC USB3300 ...
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... Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface Block Diagram The USB3300 is a highly integrated USB PHY. It contains a complete Hi-Speed USB 2.0 PHY with the ULPI industry standard interface to support fast time to market for a USB product. The USB3300 is composed of the functional blocks shown in Figure 3, " ...
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... Pin Configuration and Pin Definitions The USB3300 is offered pin QFN package ( 0.9mm). The pin definitions and locations are documented below. USB3300 Pin Locations GND GND CPEN VBUS ID VDD3 The exposed flag of the QFN package must be connected to ground with a via array to the ground plane ...
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... Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface Table 1 USB3300 Pin Definitions (continued) DIRECTION, PIN NAME VDD3 RESET Input, CMOS 10 EXTVBUS Input, CMOS 11 NXT 12 DIR 13 STP 14 CLKOUT 15 VDD1.8 16 VDD3.3 SMSC USB3300 ACTIVE TYPE LEVEL DESCRIPTION Input, N/A ID pin of the USB cable. For non-OTG applications Analog this pin can be floated ...
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... Table 1 USB3300 Pin Definitions (continued) DIRECTION, PIN NAME 17 DATA[7] 18 DATA[6] 19 DATA[5] 20 DATA[4] 21 DATA[3] 22 DATA[2] 23 DATA[1] 24 DATA[0] 25 VDD3.3 26 VDD1 VDDA1.8 30 VDD3.3 Revision 1.08 (11-07-07) Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface ACTIVE TYPE LEVEL DESCRIPTION I/O, N/A 8-bit bi-directional data bus. Bus ownership is CMOS, determined by DIR ...
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... Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface Table 1 USB3300 Pin Definitions (continued) DIRECTION, PIN NAME 31 REG_EN 32 RBIAS GND FLAG SMSC USB3300 ACTIVE TYPE LEVEL DESCRIPTION I/O, N/A On-Chip 1.8V regulator enable. Connect to ground to CMOS, disable both of the on chip (VDDA1.8 and VDD1.8) Pull-low regulators ...
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... R . VBUS USB C Receptacle VBUS 1 VBUS SHIELD GND C DC_BLOCK Figure 5 USB3300 Application Diagram (Peripheral) Revision 1.08 (11-07-07) Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface USB3300 DATA7 DATA6 DATA5 DATA4 DATA3 R VBUS DATA2 4 VBUS DATA1 DATA0 STP ...
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... Ohms will protect against VBUS transients up to 8.5V. 3.3V The capacitor C must be VBUS installed on this side VBUS USB Receptacle 1 VBUS SHIELD GND Figure 6 USB3300 Application Diagram (Host or OTG) SMSC USB3300 USB3300 3 CPEN DATA7 DATA6 DATA5 DATA4 10 EXTVBUS DATA3 DATA2 4 VBUS DATA1 R DATA0 VBUS 31 REG_EN 30 VDD3 ...
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... USB C Receptacle VBUS 1 VBUS SHIELD GND C DC_BLOCK Figure 7 USB3300 Application Diagram (Peripheral with Over Voltage Protection) Revision 1.08 (11-07-07) Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface USB3300 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 4 VBUS DATA1 DATA0 STP ...
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... Link ASIC and the hub can be placed on a separate board next to the USB ports. The only data connection required between the boards is DP and DM. The CPEN output of the USB3300 is optional and can be used to turn the Hub on or off to lower current when the USB connection isn’t needed. ...
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... Package Outline The USB3300 is offered in a compact 32 lead-free QFN package. Figure 9 USB3300-EZK 32 Pin QFN Package Outline 0.9 mm Body (Lead-Free) Table 2 32 Terminal QFN Package Parameters MIN NOMINAL A 0. 0.20 REF D 4.85 D1 4.55 D2 3.15 E 4.85 E1 4.55 E2 3.15 L 0.30 e 0.50 BSC b 0.18 ccc ...