UDA1343TT NXP Semiconductors, UDA1343TT Datasheet - Page 18

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UDA1343TT

Manufacturer Part Number
UDA1343TT
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UDA1343TT

Single Supply Voltage (typ)
3V
Single Supply Voltage (min)
2.4V
Single Supply Voltage (max)
3.6V
Package Type
TSSOP
Lead Free Status / RoHS Status
Not Compliant

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Table 9 L3 register mapping including default register settings; bits D7 to D0
Writable and readable registers
00H
11H
12H
13H
14H
20H
7FH
Readable registers
18H
NUM
REG
system setting
MASTER volume
control
silence detector
ADC output select
ADC volume
I
mute
de-emphasis
ADC settings
software reset
interpolator
2
S-bus mixer volume
FUNCTION
VC-IIS7
PGAL3
VC7
D7
0
0
0
0
0
0
VC-IIS16
PGAL2
VC6
D6
1
0
0
0
0
0
SDET-IIS-R
SFOR3
VC-IIS5
PGAL1
VC5
D5
0
0
0
0
0
0
SDET-IIS-L
VC-IIS4
SFOR2
PGAL0
VC4
D4
0
0
0
0
0
0
VC-IIS3
SFOR1
PGAR3
VC3
D3
0
0
0
0
0
0
MTM state
VC-IIS2
SFOR0
PGAR2
SDET1
VC2
DE2
D2
0
0
0
0
0
0
MT-ADC
VC-IIS1
PGAR1
SDET0
state
VC1
DE1
D1
0
0
0
0
0
MT-IIS state
SDET_on
VC-IIS0
PGAR0
VC0
DE0
MIX
D0
0
0
1
0
0
0

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