LM1262NA National Semiconductor, LM1262NA Datasheet - Page 12

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LM1262NA

Manufacturer Part Number
LM1262NA
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM1262NA

Power Supply Requirement
Single
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Mounting
Through Hole
Pin Count
24
Package Type
MDIP
Lead Free Status / RoHS Status
Not Compliant

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Functional Description
H Flyback: H Flyback is an analog signal input from the
monitor horizontal scan. The “H Blank” section uses this
signal to add horizontal blanking to the output video signal.
This enables the user to blank at the cathodes during hori-
zontal flyback. An optional capacitor and/or resistor to
ground may be needed if noise interferes with the H Flyback
signal.
This feature gives very accurate timing for the horizontal
blanking; however, the flyback signal must be very clean.
There should be no ringing or other noise on the flyback
signal.
R
value of +1 mA during flyback and −100 µA during normal
forward scan. For example if an H flyback with a peak of
100V is used, R
of pin 24 is low to limit the maximum voltage swing at the
input to within the supply rail and ground. The IC interface
circuit creates a digital signal from this waveform, which is
used as the blanking signal at the “Output Buffer Amp”. This
signal adds blanking to the video output signal. Figure 5
shows the H flyback waveforms and the location of R
56 pF capacitor has been added to the H Flyback pin on the
demo board for filtering noise on the H Flyback signal.
LIMIT
is used to limit the input current into the IC to a typical
LIMIT
= 100 k . The internal input impedance
FIGURE 4. ABL
(Continued)
LIMIT
DS200404-26
. A
12
H Blank: Some customers may still prefer to use a standard
logic signal for the horizontal blanking. Pin 24 can be
adapted to accept a logic input. It is necessary for the current
flow into pin 24 to reverse for proper operation. Therefore the
logic signal must be AC coupled into pin 24. Figure 6 shows
the recommended circuit for a logic signal input. The blank
signal must be a positive pulse.
V Blank and Sandcastle Pulse: By setting bit 1 of register
0B to a “1” the vertical blanking function is enabled. In this
mode the vertical blanking is OD’d with the horizontal blank-
ing, setting the outputs of the LM1262 to the blank level the
vertical flyback time. Activating vertical blanking also syn-
chronizes the I
DAC4 (brightness) registers to occur within the vertical re-
trace period. Therefore each field will have a uniform bright-
ness since all contrast and brightness changes occur only
during the vertical retrace period.
Two different ways are used to input vertical blanking into the
LM1262:
FIGURE 6. Standard Logic H Blank
FIGURE 5. H Flyback Input Pulse
2
C updates being made to the contrast and
DS200404-28
DS200404-27

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