MF6CWM-100 National Semiconductor, MF6CWM-100 Datasheet - Page 16

MF6CWM-100

Manufacturer Part Number
MF6CWM-100
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of MF6CWM-100

Architecture
Switched Capacitor
Dual Supply Voltage (typ)
±3/±5V
Power Supply Requirement
Single/Dual
Single Supply Voltage (min)
5V
Dual Supply Voltage (min)
±2.5V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Package Type
SOIC W
Filter Type
Low Pass Filter
Lead Free Status / RoHS Status
Not Compliant

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2.0 Designing with the MF6
2.3 IMPLEMENTING A “NOTCH” FILTER WITH THE MF6
A “notch” filter with 60 dB of attenuation can be obtained by
using one of the Op-Amps, available in the MF6, and three
external resistors. The circuit and amplitude response are
shown in Figures 15, 16 .
The frequency where the “notch” will occur is equal to the
frequency at which the output signal of the MF6 will have the
same magnitude but be 180 degrees out of phase with its in-
put signal. For a sixth order Butterworth filter 180˚ phase
shift occurs where f = f
frequency is 0.12 dB which must be compensated for by
making R
FIGURE 13. One MF6-50 vs. Two MF6-50s Cascaded
1
= 1.014 x R
2
n
.
= 0.742 f
c
. The attenuation at this
DS005065-26
FIGURE 12. Cascading Two MF6s
(Continued)
16
Since R
above and below the notch frequency. At frequencies below
the notch frequency (f
has a gain of one and is non-inverting. Summing this with the
input signal through the Op-Amp yields an overall gain of two
or +6 dB. For f
greatly attenuated thus only the input signal will appear at
the output of the Op-Amp. With R
all gain is 0.986 or −0.12 dB at frequencies above the notch.
1
does not equal R
FIGURE 14. Phase Response of
>>
Two Cascaded MF6-50s
f
n
, the signal at the output of the filter is
<<
2
f
n
there will be a gain inequality
), the signal through the filter
3
= R
1
= 1.014 R
DS005065-25
DS005065-27
2
the over-

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