ISP1506ABS,518 NXP Semiconductors, ISP1506ABS,518 Datasheet - Page 51

• Manufacturer Part Number: ISP1506ABS,518
• Description: RF Transceiver USB ULPI TRNSCVR
• Manufacturer: NXP Semiconductors

Specifications of ISP1506ABS,518

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Operating Supply Voltage (typ): Not RequiredV
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Supply Voltage: 1.65 V to 3.6 V
• Mounting Style: SMD/SMT
• Package / Case: HVQFN-24
• Lead Free Status / RoHS Status: Compliant
• Other names: 935278332518 ISP1506ABS-T

NXP Semiconductors
Table 34.
Table 35.
Table 36.
Table 37.
ISP1506A_ISP1506B_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
7 to 5
4
3
2
1
0
Bit
Symbol
Reset
Access
Bit
7 to 5
4
3
2
1
0
Symbol
reserved
ID_GND_L
SESS_END_L
SESS_VALID_L
VBUS_VALID_L
HOST_DISCON_L
Symbol
-
ID_GND
SESS_END
SESS_VALID
VBUS_VALID
HOST_DISCON
USB Interrupt Status register (address R = 13h) bit allocation
USB Interrupt Status register (address R = 13h) bit description
USB Interrupt Latch register (address R = 14h) bit allocation
USB Interrupt Latch register (address R = 14h) bit description
10.1.8 USB Interrupt Latch register
X
R
R
7
7
0
The bits of the USB Interrupt Latch register are automatically set by the ISP1506 when an
unmasked change occurs on the corresponding interrupt source signal. The ISP1506 will
automatically clear all bits when the link reads this register, or when the PHY enters
low-power mode.
Remark: It is optional for the link to read this register when the clock is running because
all signal information will automatically be sent to the link through the RXCMD byte.
The bit allocation of this register is given in
Description
reserved
ID Ground: Reflects the current value of the ID detector circuit.
Session End: Reflects the current value of the session end voltage comparator.
Session Valid: Reflects the current value of the session valid voltage comparator.
V
Host Disconnect: Reflects the current value of the host disconnect detector.
reserved
reserved
Description
-
ID Ground Latch: Automatically set when an unmasked event occurs on ID_GND. Cleared
when this register is read.
Session End Latch: Automatically set when an unmasked event occurs on SESS_END.
Cleared when this register is read.
Session Valid Latch: Automatically set when an unmasked event occurs on SESS_VLD.
Cleared when this register is read.
V
Cleared when this register is read.
Host Disconnect Latch: Automatically set when an unmasked event occurs on
HOST_DISCON. Cleared when this register is read.
BUS
BUS
R
R
X
6
6
0
Valid: Reflects the current value of the V
Valid Latch: Automatically set when an unmasked event occurs on VBUS_VLD.
X
R
R
5
5
0
Rev. 02 — 28 August 2008
ID_GND_L
ID_GND
R
R
4
0
4
0
SESS_
SESS_
END_L
Table
END
R
R
3
0
3
0
ISP1506A; ISP1506B
BUS
valid voltage comparator.
36.
VALID_L
SESS_
SESS_
VALID
ULPI HS USB OTG transceiver
R
R
2
0
2
0
VALID_L
VBUS_
VBUS_
VALID
R
R
1
0
1
0
© NXP B.V. 2008. All rights reserved.
DISCON_L
DISCON
HOST_
HOST_
R
R
0
0
0
0
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