ISP1507D1HNUM STEricsson, ISP1507D1HNUM Datasheet - Page 30

• Manufacturer Part Number: ISP1507D1HNUM
• Manufacturer: STEricsson

Specifications of ISP1507D1HNUM

• Lead Free Status / RoHS Status: Compliant

Table 16.
[1]
CD00269906
Product data sheet
Parameter name
RXCMD delay (J and K)
RXCMD delay (SE0)
TX start delay
TX end delay (packets)
TX end delay (SOF)
RX start delay
RX end delay
Fig 10. Example of using the ISP1507D1 to transmit and receive USB data
DATA [ 7:0 ]
According to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6, the TX and RX start or end delays must be used
for high-speed inter-packet timing. If the link uses RXCMDs for high-speed inter-packet timing, the result cannot be guaranteed.
CLOCK
NXT
STP
DIR
PHY pipeline delays
10.8.1.1 ISP1507D1 pipeline delays
10.8.1 USB packet timing
10.8 USB packet transmit and receive
[1]
An example of a packet transmit and receive is shown in
packets, refer to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1.
The ISP1507D1 delays are shown in
Low Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6.2.
link sends
TXCMD
TXCMD
High-speed PHY delay
4
4
1 to 2
3 to 4
6 to 9
5 to 6
5 to 6
ISP1507D1
TXCMD
accepts
the next data;
DATA
ISP1507D1
link sends
accepts
Rev. 03 — 28 July 2010
link signals
end of data
Table
Full-speed PHY delay
4
4 to 6
6 to 10
not applicable
not applicable
not applicable
17 to 18
ULPI bus
ULPI HS USB host and peripheral transceiver
is idle
16. For a detailed description, refer to UTMI+
turnaround
asserts DIR,
ISP1507D1
turnaround
causing
cycle
RXCMD
Figure
ISP1507D1
(NXT LOW)
RXCMD
sends
Low-speed PHY delay
4
16 to 18
74 to 75
not applicable
not applicable
not applicable
122 to 123
10. For details on USB
ISP1507D1
DATA
(NXT HIGH)
ISP1507D1
USB data
© ST-ERICSSON 2010. All rights reserved.
sends
turnaround
DIR, causing
ISP1507D1
turnaround
deasserts
cycle
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