ISP1506ABS,557 NXP Semiconductors, ISP1506ABS,557 Datasheet - Page 44

• Manufacturer Part Number: ISP1506ABS,557
• Manufacturer: NXP Semiconductors

Specifications of ISP1506ABS,557

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Power Supply Requirement: Single
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
ISP1506A_ISP1506B_2
Product data sheet
Fig 20. Example of transmit followed by receive in 3-pin serial mode
(TX_ENABLE)
DATA1
DATA2
DATA0
(SE0)
(DAT)
DM
DP
9.14 Aborting transfers
9.15 Avoiding contention on the ULPI data bus
The ISP1506 supports aborting transfers on the ULPI bus. For details, refer to
“UTMI+ Low Pin Interface (ULPI) Specification Rev.
Because the ULPI data bus is bidirectional, avoid situations in which both the link and the
PHY simultaneously drive the data bus.
The following points must be considered while implementing the data bus drive control on
the link.
After power-up and clock stabilization, default states are as follows:
When the ISP1506 wants to take control of the data bus to initiate a data transfer, it
changes the DIR value from LOW to HIGH.
At this point, the link must disable its output buffers. This must be as fast as possible so
the link must use a combinational path from DIR.
The ISP1506 will not immediately enable its output buffers, but will delay the enabling of
its buffers until the next clock edge, avoiding bus contention.
When the data transfer is no longer required by the ISP1506, it changes DIR from HIGH to
LOW and starts to immediately turn off its output drivers. The link senses the change of
DIR from HIGH to LOW, but delays enabling its output buffers for one CLOCK cycle,
avoiding data bus contention.
•
•
•
SYNC
The ISP1506 drives DIR to LOW.
The data bus is input to the ISP1506.
The ULPI link data bus is output, with all data bus lines driven to LOW.
DATA
TRANSMIT
Rev. 02 — 28 August 2008
EOP
ISP1506A; ISP1506B
SYNC
1.1”, Section 3.8.4.
RECEIVE
ULPI HS USB OTG transceiver
DATA
© NXP B.V. 2008. All rights reserved.
EOP
004aaa982
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