SC16C850SVIBS-S NXP Semiconductors, SC16C850SVIBS-S Datasheet - Page 18

• Manufacturer Part Number: SC16C850SVIBS-S
• Manufacturer: NXP Semiconductors

Specifications of SC16C850SVIBS-S

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
9397 750 11618
Product data
6.8 Break and time-out conditions
6.9 Programmable baud rate generator
An RX idle condition is detected when the receiver line, RX, has been HIGH for
4 character time. The receiver line is sampled midway through each bit.
When a break condition occurs, the TX line is pulled LOW. A break condition is
activated by setting LCR[6].
The SC16C754 UART contains a programmable baud generator that takes any clock
input and divides it by a divisor in the range between 1 and (2
divide-by-4 prescaler is also available and can be selected by MCR[7], as shown in
Figure
formula for the divisor is:
Where:
Remark: The default value of prescaler after reset is divide-by-1.
Figure 12
DLL and DLH must be written to in order to program the baud rate. DLL and DLH are
the least significant and most significant byte of the baud rate divisor. If DLL and DLH
are both zero, the UART is effectively disabled, as no baud clock will be generated.
Remark: The programmable baud rate generator is provided to select both the
transmit and receive clock rates.
Table 7
frequency 1.8432 MHz and 3.072 MHz, respectively.
Figure 13
divisor
Fig 12. Prescaler and baud rate generator block diagram.
prescaler = 1, when MCR[7] is set to 0 after reset (divide-by-1 clock selected)
prescaler = 4, when MCR[7] is set to 1 after reset (divide-by-4 clock selected).
XTAL1
XTAL2
12. The output frequency of the baud rate generator is 16 the baud rate. The
=
and
-------------------------------------------------------------------------------- -
shows the internal prescaler and baud rate generator circuitry.
shows the crystal clock circuit reference.
XTAL1 crystal input frequency
---------------------------------------------------------------------------
Table 8
OSCILLATOR
INTERNAL
desired baud rate 16
LOGIC
Rev. 04 — 19 June 2003
show the baud rate and divisor correlation for crystal with
prescaler
INPUT CLOCK
(DIVIDE-BY-1)
(DIVIDE-BY-4)
PRESCALER
PRESCALER
LOGIC
LOGIC
MCR[7] = 0
MCR[7] = 1
REFERENCE
CLOCK
Quad UART with 64-byte FIFO
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
GENERATOR
BAUD RATE
LOGIC
16
SC16C754
1). An additional
002aaa233
INTERNAL
BAUD RATE
CLOCK FOR
TRANSMITTER
AND
RECEIVER
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