STK12C68-5L35M Cypress Semiconductor Corp, STK12C68-5L35M Datasheet - Page 10

• Manufacturer Part Number: STK12C68-5L35M
• Description: STK12C68-5L35M
• Manufacturer: Cypress Semiconductor Corp

Specifications of STK12C68-5L35M

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 64K (8K x 8)
• Speed: 35ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Package / Case: 28-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Notes
Switching Waveforms
Document Number: 001-51026 Rev. **
SRAM Write Cycle
t
t
t
t
t
t
t
t
t
t
10. If WE is Low when CE goes Low, the outputs remain in the high impedance state.
11. HSB must be high during SRAM Write cycles.
12. CE or WE must be greater than V
WC
PWE
SCE
SD
HD
AW
SA
HA
HZWE
LZWE
Parameter
Cypress
[9]
[9,10]
ADDRESS
DATA OUT
Parameter
DATA IN
ADDRESS
DATA OUT
DATA IN
WE
CE
CE
WE
t
t
t
t
t
t
t
t
t
t
AVAV
WLWH,
ELWH,
DVWH,
WHDX,
AVWH,
AVWL,
WHAX,
WLQZ
WHQX
t
t
t
Alt
t
t
t
t
AVEL
ELEH
AVEH
EHAX
WLEH
DVEH
EHDX
IH
during address transitions.
Write Cycle Time
Write Pulse Width
Chip Enable To End of Write
Data Setup to End of Write
Data Hold After End of Write
Address Setup to End of Write
Address Setup to Start of Write
Address Hold After End of Write
Write Enable to Output Disable
Output Active After End of Write
PREVIOUS DATA
Figure 10. SRAM Write Cycle 1: WE Controlled
t
Figure 11. SRAM Write Cycle 2: CE Controlled
SA
t
SA
Description
t
AW
t
HZWE
HIGH IMPEDANCE
t
t
t
AW
SCE
PWE
t
WC
t
t
SCE
WC
t
HIGH IMPEDANCE
PWE
DATA VALID
t
SD
t
SD
Min
DATA VALID
35
25
25
12
25
0
0
0
5
35 ns
STK12C68-5 (SMD5962-94599)
t
t
HD
HA
Max
13
[11, 12]
[11, 12]
t
HA
t
LZWE
t
HD
Min
55
45
45
25
45
0
0
0
5
55 ns
Max
15
Page 10 of 18
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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