STK12C68-5L35M Cypress Semiconductor Corp, STK12C68-5L35M Datasheet

STK12C68-5L35M

STK12C68-5L35M

Manufacturer Part Number
STK12C68-5L35M
Description
STK12C68-5L35M
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of STK12C68-5L35M

Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
64K (8K x 8)
Speed
35ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Package / Case
28-LCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Cypress Semiconductor Corporation
Document Number: 001-51026 Rev. **
Features
Logic Block Diagram
35 ns and 55 ns access times
Hands off automatic STORE on power down with external
68 µF capacitor
STORE to QuantumTrap™ nonvolatile elements is initiated
by software, hardware, or AutoStore™ on power down
RECALL to SRAM initiated by software or power up
Unlimited Read, Write, and Recall cycles
1,000,000 STORE cycles to QuantumTrap
100 year data retention to QuantumTrap
Single 5V+10% operation
Military temperature
28-pin (300mil) CDIP and 28-pad LCC packages
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
A
A
A
A
A
A
A
0
1
2
3
4
7
5
6
5
6
7
8
9
11
12
198 Champion Court
A
64 Kbit (8K x 8) AutoStore nvSRAM
0
COLUMN DEC
COLUMN I/O
A
STATIC RAM
1
128 X 512
ARRAY
A
2
A
3
A
4
Quantum Trap
A
Functional Description
The Cypress STK12C68-5 is a fast static RAM with a nonvol-
atile element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down.
On power up, data is restored to the SRAM (the RECALL
operation) from the nonvolatile memory. Both the STORE and
RECALL operations are also available under software control.
A hardware STORE is initiated with the HSB pin.
10
128 X 512
STORE
RECALL
STK12C68-5 (SMD5962-94599)
San Jose
V
CONTROL
CONTROL
CC
RECALL
POWER
STORE/
,
CA 95134-1709
V
CAP
SOFTWARE
DETECT
HSB
Revised March 02, 2009
A
OE
CE
WE
0
-
A
12
408-943-2600
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Related parts for STK12C68-5L35M

STK12C68-5L35M Summary of contents

Page 1

... Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) 64 Kbit ( AutoStore nvSRAM Functional Description The Cypress STK12C68 fast static RAM with a nonvol- atile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent nonvolatile data resides in the highly reliable QuantumTrap cell ...

Page 2

... V Power Supply AutoStore Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM CAP to nonvolatile elements. Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) Figure 2. Pin Diagram - 28-Pin LLC Description Page [+] Feedback ...

Page 3

... Device Operation The STK12C68-5 nvSRAM is made up of two functional compo- nents paired in the same physical cell. These are an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvolatile cell (the STORE operation) or from the nonvolatile cell to SRAM (the RECALL operation) ...

Page 4

... RECALL request is latched. When V RESET once again exceeds the sense voltage of V cycle is automatically initiated and takes t If the STK12C68 Write state at the end of power up RECALL, the SRAM data is corrupted. To help avoid this situation Kohm resistor is connected either between WE and system V ...

Page 5

... STORE, the Write is inhibited until a negative transition detected. This protects against inadvertent writes during power up or brown out conditions. Noise Considerations The STK12C68 high speed memory. It must have a high frequency bypass capacitor of approximately 0.1 µF connected between V and V using leads and traces that are as short ...

Page 6

... IO state assumes OE < Activation of nonvolatile cycles does not depend on state of OE. IL Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) ■ Power up boot firmware routines must rewrite the nvSRAM into the desired state. While the nvSRAM is shipped in a preset state, best practice is to again rewrite the nvSRAM ...

Page 7

... VCC if that is where the power supply connection is made > V does not produce standby current levels until any nonvolatile cycle in progress has timed out. IH Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) Voltage on DQ Power Dissipation.......................................................... 1.0W DC output Current (1 output at a time, 1s duration) .... 15 mA Operating Range Range Military + 0 ...

Page 8

... AC Test Conditions Input Pulse Levels .................................................... Input Rise and Fall Times (10% to 90%) ...................... <5 ns Input and Output Timing Reference Levels .......................1.5 Note 6. These parameters are guaranteed by design and are not tested. Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) Min 100 1,000 [6] Test Conditions T = 25° MHz, ...

Page 9

... Figure 9. SRAM Read Cycle 2: CE and OE Controlled Notes 7. WE and HSB must be High during SRAM Read cycles. 8. Device is continuously selected with CE and OE both Low. 9. Measured ±200 mV from steady state output voltage. Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599 Description Min Max 35 35 ...

Page 10

... Figure 11. SRAM Write Cycle 2: CE Controlled ADDRESS DATA IN DATA OUT Notes 10 Low when CE goes Low, the outputs remain in the high impedance state. 11. HSB must be high during SRAM Write cycles. 12 must be greater than V during address transitions. IH Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599 Description Min Max ...

Page 11

... CE and OE low for output behavior. 15. CE and OE low and WE high for output behavior. 16. HSB is asserted low for 1us when V drops through V CAP takes place. Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) Description ) to HSB Low SWITCH Figure 12. AutoStore/Power Up RECALL . SWITCH . If an SRAM Write has not taken place since the last nonvolatile cycle, HSB is released and no store ...

Page 12

... ADDRESS SCE CE t HACE OE DATA VALID DQ (DATA) Notes 17. The software sequence is clocked on the falling edge of CE without involving OE (double clocking aborts the sequence). 18. The six consecutive addresses must be read in the order listed in Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) [18 Description Min ...

Page 13

... Hardware STORE Pulse Width PHSB HLHX t Hardware STORE Low to STORE Busy HLBL Switching Waveform Note 19 only applicable after t is complete. DHSB STORE Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) Description Figure 14. Hardware STORE Cycle STK12C68-5 Unit Min Max 10 ms 700 300 ns Page ...

Page 14

... Part Numbering Nomenclature STK12C68 - SMD5962 - 94599 Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) Package Ceramic 28-pin 300 mil DIP (gold lead finish Ceramic 28-pin 300 mil DIP (Solder dip finish Ceramic 28-pin LLC Retention / Endurance Military (10 years or 10 cycles) Lead Finish A = Solder DIP lead finish C = Gold lead DIP finish X = Lead finish “ ...

Page 15

... Ordering Information Speed (ns) Ordering Code 35 STK12C68-5C35M STK12C68-5K35M STK12C68-5L35M 55 STK12C68-5C55M STK12C68-5K55M STK12C68-5L55M The above table contains Final information. Contact your local Cypress sales representative for availability of these parts Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) Package Diagram Package Type 001-51695 28-pin CDIP (300 mil) ...

Page 16

... Package Diagrams Figure 15. 28-Pin (300-Mil) Side Braze DIL (001-51695) Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) 001-51695 ** Page [+] Feedback ...

Page 17

... Package Diagrams (continued) 1. ALL DIMENSION ARE IN INCHES AND MILLIMETERS [MIN/MAX] 2. JEDEC 95 OUTLINE# MO-041 3. PACKAGE WEIGHT : TBD Document Number: 001-51026 Rev. ** STK12C68-5 (SMD5962-94599) Figure 16. 28-Pad (350-Mil) LCC (001-51696) 001-51696 ** Page [+] Feedback ...

Page 18

... Document History Page Document Title: STK12C68-5 (SMD5962-94599), 64 Kbit ( AutoStore nvSRAM Document Number: 001-51026 Orig. of Rev ECN No. Change ** 2666844 GVCH/PYRS Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress ...

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