PIC24HJ64GP210A-E/PF Microchip Technology, PIC24HJ64GP210A-E/PF Datasheet - Page 54
![16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24HJ64GP210A-E/PF
Manufacturer Part Number
PIC24HJ64GP210A-E/PF
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206A-IMR.pdf
(304 pages)
3.PIC24HJ64GP206A-IMR.pdf
(10 pages)
Specifications of PIC24HJ64GP210A-E/PF
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP210A-E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ64GP206A-IMR PDF datasheet #2
- PIC24HJ64GP206A-IMR PDF datasheet #3
- Current page: 54 of 304
- Download datasheet (3Mb)
TABLE 4-31:
TABLE 4-32:
TABLE 4-33:
RCON
OSCCON
CLKDIV
PLLFBD
OSCTUN
Legend:
Note
NVMCON
NVMKEY
Legend:
Note
PMD1
PMD2
PMD3
Legend:
File Name
File Name
File Name
1:
2:
1:
Addr
0742
0744
0746
0748
0740
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for PinHigh devices.
RCON register Reset values dependent on type of Reset.
OSCCON register Reset values dependent on the FOSC Configuration bits and by type of Reset.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for PinHigh devices.
Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for PinHigh devices.
Addr
Addr
0770
0772
0774
0760
0766
SYSTEM CONTROL REGISTER MAP
NVM REGISTER MAP
PMD REGISTER MAP
TRAPR
Bit 15
IC8MD
Bit 15
Bit 15
T5MD
T9MD
ROI
—
—
—
WR
—
IOPUWR
IC7MD
Bit 14
Bit 14
T4MD
T8MD
WREN
Bit 14
—
—
—
COSC<2:0>
DOZE<2:0>
IC6MD
Bit 13
T3MD
T7MD
Bit 13
WRERR
Bit 13
—
—
—
—
IC5MD
Bit 12
T2MD
T6MD
Bit 12
Bit 12
—
—
—
—
—
IC4MD
DOZEN
Bit 11
T1MD
Bit 11
—
—
—
—
—
Bit 11
—
—
IC3MD
Bit 10
Bit 10
—
—
—
—
—
Bit 10
—
—
FRCDIV<2:0>
NOSC<2:0>
IC2MD
Bit 9
Bit 9
—
—
—
—
—
Bit 9
—
—
VREGS
IC1MD
Bit 8
Bit 8
—
—
—
Bit 8
—
—
CLKLOCK
I2C1MD
OC8MD
EXTR
Bit 7
PLLPOST<1:0>
Bit 7
—
—
Bit 7
—
OC7MD
Bit 6
SWR
U2MD
Bit 6
—
—
ERASE
—
Bit 6
SWDTEN
LOCK
OC6MD
Bit 5
U1MD
Bit 5
—
—
Bit 5
—
PLLDIV<8:0>
WDTO
SPI2MD
OC5MD
Bit 4
—
Bit 4
Bit 4
—
NVMKEY<7:0>
—
SLEEP
SPI1MD
Bit 3
OC4MD
CF
Bit 3
Bit 3
—
TUN<5:0>
PLLPRE<4:0>
Bit 2
OC3MD
IDLE
C2MD
—
Bit 2
Bit 2
—
NVMOP<3:0>
LPOSCEN
OC2MD
I2C2MD
Bit 1
BOR
C1MD
Bit 1
Bit 1
OSWEN
AD1MD
OC1MD
AD2MD
Bit 0
POR
Bit 0
Bit 0
Resets
xxxx
0300
3040
0030
0000
Resets
Resets
0000
0000
0000
0000
0000
All
All
All
(1)
(2)
(1)
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