PIC24HJ64GP210A-E/PF Microchip Technology, PIC24HJ64GP210A-E/PF Datasheet - Page 226
![16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24HJ64GP210A-E/PF
Manufacturer Part Number
PIC24HJ64GP210A-E/PF
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206A-IMR.pdf
(304 pages)
3.PIC24HJ64GP206A-IMR.pdf
(10 pages)
Specifications of PIC24HJ64GP210A-E/PF
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP210A-E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ64GP206A-IMR PDF datasheet #2
- PIC24HJ64GP206A-IMR PDF datasheet #3
- Current page: 226 of 304
- Download datasheet (3Mb)
PIC24HJXXXGPX06A/X08A/X10A
21.5
PIC24HJXXXGPX06A/X08A/X10A devices implement
a JTAG interface, which supports boundary scan
device testing, as well as in-circuit programming.
Detailed information on the interface will be provided in
future revisions of the document.
21.6
The PIC24H product families offer advanced imple-
mentation of CodeGuard™ Security. CodeGuard
Security enables multiple parties to securely share
resources (memory, interrupts and peripherals) on a
single chip. This feature helps protect individual
Intellectual Property in collaborative system designs.
When coupled with software encryption libraries,
CodeGuard Security can be used to securely update
Flash even when multiple IP are resident on the single
chip. The code protection features vary depending on
the actual PIC24H implemented. The following
sections provide an overview these features.
The code protection features are controlled by the
Configuration registers: FBS, FSS and FGS.
DS70592B-page 226
Note:
Note:
JTAG Interface
Code Protection and
CodeGuard™ Security
For further information, refer to the
Manual“, Section 24. “Programming
and Diagnostics” (DS70246), which is
available from the Microchip website
(www.microchip.com).
For further information, refer to the
“dsPIC33F/PIC24H
Manual”, Section 23. “CodeGuard™
Security” (DS70239), which is available
from the Microchip website (www.micro-
chip.com).
dsPIC33F/PIC24H
Family
Family
Reference
Reference
Preliminary
21.7
PIC24HJXXXGPX06A/X08A/X10A family digital signal
controllers can be serially programmed while in the end
application circuit. This is simply done with two lines for
clock and data and three other lines for power, ground
and the programming sequence. This allows custom-
ers to manufacture boards with unprogrammed
devices and then program the digital signal controller
just before shipping the product. This also allows the
most recent firmware or a custom firmware, to be pro-
grammed. Please refer to the “dsPIC33F/PIC24H
Flash
document for details about ICSP programming
capability.
Any one out of three pairs of programming clock/data
pins may be used:
• PGEC1 and PGED1
• PGEC2 and PGED2
• PGEC3 and PGED3
21.8
When MPLAB
in-circuit debugging functionality is enabled. This func-
tion allows simple debugging functions when used with
MPLAB IDE. Debugging functionality is controlled
through the PGECx (Emulation/Debug Clock) and
PGEDx (Emulation/Debug Data) pin functions.
Any one out of three pairs of debugging clock/data pins
may be used:
• PGEC1 and PGED1
• PGEC2 and PGED2
• PGEC3 and PGED3
To use the in-circuit debugger function of the device,
the design must implement ICSP programming capa-
bility connections to MCLR, V
PGECx pin pair. In addition, when the feature is
enabled, some of the resources are not available for
general use. These resources include the first 80 bytes
of data RAM and two I/O pins.
In-Circuit Serial Programming
Programming Capability
Programming
In-Circuit Debugger
®
ICD 2 is selected as a debugger, the
2009 Microchip Technology Inc.
Specification”
DD
, V
SS
and the PGEDx/
(DS70152)
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