PIC24HJ64GP210A-E/PF Microchip Technology, PIC24HJ64GP210A-E/PF Datasheet - Page 213
![16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24HJ64GP210A-E/PF
Manufacturer Part Number
PIC24HJ64GP210A-E/PF
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206A-IMR.pdf
(304 pages)
3.PIC24HJ64GP206A-IMR.pdf
(10 pages)
Specifications of PIC24HJ64GP210A-E/PF
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP210A-E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ64GP206A-IMR PDF datasheet #2
- PIC24HJ64GP206A-IMR PDF datasheet #3
- Current page: 213 of 304
- Download datasheet (3Mb)
REGISTER 20-3:
2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-13
bit 12-8
bit 7-0
Note 1: This bit only used if ADxCON1<7:5> (SSRC<2:0>) = 111.
R/W-0
ADRC
R/W-0
2: This bit is not used if ADxCON3<15> (ADRC) = 1.
ADRC: ADC Conversion Clock Source bit
1 = ADC internal RC clock
0 = Clock derived from system clock
Unimplemented: Read as ‘0’
SAMC<4:0>: Auto Sample Time bits
11111 = 31 T
•
•
•
00001 = 1 T
00000 = 0 T
ADCS<7:0>: Analog-to-Digital Conversion Clock Select bits
11111111 = Reserved
•
•
•
01000000 = Reserved
00111111 = T
•
•
•
00000010 = T
00000001 = T
00000000 = T
R/W-0
U-0
—
ADxCON3: ADCx CONTROL REGISTER 3
AD
AD
AD
W = Writable bit
‘1’ = Bit is set
CY
CY
CY
CY
PIC24HJXXXGPX06A/X08A/X10A
· (ADCS<7:0> + 1) = 64 · T
· (ADCS<7:0> + 1) = 3 · T
· (ADCS<7:0> + 1) = 2 · T
· (ADCS<7:0> + 1) = 1 · T
R/W-0
U-0
—
R/W-0
R/W-0
Preliminary
ADCS<7:0>
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CY
CY
CY
CY
R/W-0
R/W-0
(2)
= T
= T
= T
= T
AD
AD
AD
AD
SAMC<4:0>
(2)
R/W-0
R/W-0
(1)
x = Bit is unknown
R/W-0
R/W-0
DS70592B-page 213
R/W-0
R/W-0
bit 8
bit 0
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