PIC24FJ256GA106-E/PT Microchip Technology, PIC24FJ256GA106-E/PT Datasheet - Page 8

• Manufacturer Part Number: PIC24FJ256GA106-E/PT
• Description: 16-bit, 16 MIPS, 256KB Flash, 16Kb RAM, 53 I/O, NanoWatt 64 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GA106-E/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC24FJ256GA110 FAMILY
7. Module: Interrupt Controller
REGISTER 6-4:
DS80385B-page 8
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 13-5
bit 4
bit 3
ALTIVT
R/W-0
In Register 6-4 (INTCON2), bits 4 and 3 of
INTCON2, currently shown as unimplemented,
are in fact implemented as INT4EP and INT3EP,
respectively.
An amended partial version of this register is
shown below (changes in bold).
U-0
—
Unimplemented: Read as ‘0’
INT4EP: External Interrupt 4 Edge Detect Polarity Select bit
1 = Interrupt on negative edge
0 = Interrupt on positive edge
INT3EP: External Interrupt 3 Edge Detect Polarity Select bit
1 = Interrupt on negative edge
0 = Interrupt on positive edge
DISI
R-0
U-0
—
INTCON2: INTERRUPT CONTROL REGISTER 2 (PARTIAL REPRESENTATION)
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
INT4EP
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INT3EP
R/W-0
8. Module: Timer2/3 and Timer4/5
U-0
—
In the bulleted list in the 3rd paragraph of
Section 11.0 “Timer2/3 and Timer4/5”, it is stated
that the ADC event trigger is only associated with
Timer4/5. In fact, the trigger is only associated with
Timer2/3. This is correctly noted in all other
occurrences in the chapter.
INT2EP
R/W-0
U-0
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
INT1EP
R/W-0
U-0
—
INT0EP
R/W-0
U-0
—
bit 8
bit 0