PIC24FJ128GA308-I/PT Microchip Technology, PIC24FJ128GA308-I/PT Datasheet - Page 266

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PIC24FJ128GA308-I/PT

Manufacturer Part Number
PIC24FJ128GA308-I/PT
Description
16-bit, 16 MIPS, 128 KB Flash, 8 KB RAM, 69 I/O, LCD, XLP W/Vbat 80 TQFP 12x12x1
Manufacturer
Microchip Technology
Datasheet

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PIC24FJ128GA310 FAMILY
21.1
The LCD controller has up to 40 registers:
• LCD Control Register (LCDCON)
• LCD Charge Pump Control Register (LCDREG)
• LCD Phase Register (LCDPS)
• LCD Voltage Ladder Control Register (LCDREF)
• Four LCD Segment Enable Registers
• Up to 32 LCD Data Registers
REGISTER 21-1:
DS39996F-page 266
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5
bit 4-3
(LCDSE3:LCDSE0)
(LCDDATA31:LCDDATA0)
LCDEN
R/W-0
U-0
Registers
LCDEN: LCD Driver Enable bit
1 = LCD driver module is enabled
0 = LCD driver module is disabled
Unimplemented: Read as ‘0’
LCDSIDL: Stop LCD Drive in CPU Idle Mode Control bit
1 = LCD driver Halts in CPU Idle mode
0 = LCD driver continues to operate in CPU Idle mode
Unimplemented: Read as ‘0’
SLPEN: LCD Driver Enable in Sleep mode bit
1 = LCD driver module is disabled in Sleep mode
0 = LCD driver module is enabled in Sleep mode
WERR: LCD Write Failed Error bit
1 = LCDDATAx register is written while WA (LCDPS<4>) = 0 (must be cleared in software)
0 = No LCD write error
CS<1:0>: Clock Source Select bits
00 = FRC
01 = LPRC
1x = SOSC
SLPEN
R/W-0
U-0
LCDCON: LCD CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
LCDSIDL
WERR
R/W-0
R/C-0
R/W-0
CS1
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
CS0
U-0
LMUX2
R/W-0
U-0
 2010-2011 Microchip Technology Inc.
x = Bit is unknown
LMUX1
R/W-0
U-0
LMUX0
R/W-0
U-0
bit 8
bit 0

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