PIC24FJ128GA308-I/PT Microchip Technology, PIC24FJ128GA308-I/PT Datasheet - Page 229
PIC24FJ128GA308-I/PT
Manufacturer Part Number
PIC24FJ128GA308-I/PT
Description
16-bit, 16 MIPS, 128 KB Flash, 8 KB RAM, 69 I/O, LCD, XLP W/Vbat 80 TQFP 12x12x1
Manufacturer
Microchip Technology
Datasheet
1.PIC24FJ128GA308-IPT.pdf
(406 pages)
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FIGURE 16-3:
FIGURE 16-4:
2010-2011 Microchip Technology Inc.
Note 1:
Note 1: Using the SSx pin in Slave mode of operation is optional.
Processor 1 (SPI Enhanced Buffer Master)
2:
2: User must write transmit data to read the received data from SPIxBUF. The SPIxTXB and SPIxRXB registers
MSTEN (SPIxCON1<5>) = 1 and
Using the SSx pin in Slave mode of operation is optional.
User must write transmit data to read the received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are
memory mapped to SPIxBUF.
SPIBEN (SPIxCON2<0>) = 1
MSTEN (SPIxCON1<5>) = 1)
are memory mapped to SPIxBUF.
Processor 1 (SPI Master)
MSb
8-Level FIFO Buffer
MSb
SPI MASTER/SLAVE CONNECTION (STANDARD MODE)
SPI MASTER/SLAVE CONNECTION (ENHANCED BUFFER MODES)
Serial Transmit Buffer
Serial Receive Buffer
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxSR)
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxRXB)
(SPIxTXB)
(SPIxSR)
(2)
(2)
LSb
LSb
SDOx
SCKx
SDIx
SDOx
SDIx
SCKx
PIC24FJ128GA310 FAMILY
SSx
Serial Clock
Serial Clock
SSEN (SPIxCON1<7>) = 1 and MSTEN (SPIxCON1<5>) = 0
SDIx
SDOx
SCKx
SSx
SDIx
SDOx
SCKx
SSx
Processor 2 (SPI Enhanced Buffer Slave)
(1)
(1)
MSb
Serial Transmit Buffer
MSTEN (SPIxCON1<5>) = 0 and
Serial Receive Buffer
Processor 2 (SPI Slave)
SPIBEN (SPIxCON2<0>) = 1
SSEN (SPIxCON1<7>) = 1,
Shift Register
(SPIxRXB)
(SPIxBUF)
(SPIxTXB)
(SPIxSR)
SPIx Buffer
MSb
8-Level FIFO Buffer
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxSR)
(2)
(2)
(2)
(2)
LSb
(2)
LSb
DS39996F-page 229
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