PIC24FJ128GA308-I/PT Microchip Technology, PIC24FJ128GA308-I/PT Datasheet - Page 237

• Manufacturer Part Number: PIC24FJ128GA308-I/PT
• Description: 16-bit, 16 MIPS, 128 KB Flash, 8 KB RAM, 69 I/O, LCD, XLP W/Vbat 80 TQFP 12x12x1
• Manufacturer: Microchip Technology

REGISTER 17-1:
 2010-2011 Microchip Technology Inc.
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
ACKDT: Acknowledge Data bit (when operating as I
Value that will be transmitted when the software initiates an Acknowledge sequence.
1 = Sends NACK during Acknowledge
0 = Sends ACK during Acknowledge
ACKEN: Acknowledge Sequence Enable bit
(when operating as I
1 = Initiates Acknowledge sequence on SDAx and SCLx pins and transmits the ACKDT data bit.
0 = Acknowledge sequence is not in progress
RCEN: Receive Enable bit (when operating as I
1 = Enables Receive mode for I
0 = Receive sequence is not in progress
PEN: Stop Condition Enable bit (when operating as I
1 = Initiates Stop condition on the SDAx and SCLx pins. Hardware is clear at the end of the master
0 = Stop condition is not in progress
RSEN: Repeated Start Condition Enable bit (when operating as I
1 = Initiates Repeated Start condition on the SDAx and SCLx pins. Hardware is clear at the end of the
0 = Repeated Start condition is not in progress
SEN: Start Condition Enable bit (when operating as I
1 = Initiates Start condition on SDAx and SCLx pins. Hardware is clear at the end of the master Start
0 = Start condition is not in progress
Hardware is clear at the end of the master Acknowledge sequence.
data byte.
Stop sequence.
master Repeated Start sequence.
sequence.
I2CxCON: I2Cx CONTROL REGISTER (CONTINUED)
2
C master; applicable during master receive)
PIC24FJ128GA310 FAMILY
2
C. Hardware is clear at the end of the eighth bit of the master receive
2
C master)
2
2
2
C master; applicable during master receive)
C master)
C master)
2
C master)
DS39996F-page 237