PIC24F04KA200T-I/ST Microchip Technology, PIC24F04KA200T-I/ST Datasheet - Page 19

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PIC24F04KA200T-I/ST

Manufacturer Part Number
PIC24F04KA200T-I/ST
Description
PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F04KA200T-I/ST

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (1.375K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F04KA200T-I/ST
Manufacturer:
MICROCHIP
Quantity:
12 000
3.10
The procedure for reading data EEPROM memory is
the same as reading the code memory. The only differ-
ence is that the 16-bit data words are read instead of
the 24-bit words.
TABLE 3-10:
© 2008 Microchip Technology Inc.
Step 1: Exit Reset vector.
Step 2: Initialize TBLPAG and the Read Pointer (W6) for TBLRD instruction.
Step 3: Initialize the Write Pointer (W7) to point to the VISI register.
Step 4: Read and clock out the contents of the next location of data EEPROM memory through the VISI register
Step 5: Repeat Step 4 until the required data EEPROM memory is read.
Step 6: Reset device internal PC.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
Reading Data EEPROM Memory
using the REGOUT command.
SERIAL INSTRUCTION EXECUTION FOR READING DATA EEPROM MEMORY
2FExx6h
000000
040200
000000
2007F0
880190
207847
000000
BA1B96
000000
000000
<VISI>
000000
040200
000000
(Hex)
Data
NOP
GOTO
NOP
MOV
MOV
MOV
MOV
NOP
TBLRDL
NOP
NOP
Clock out contents of VISI register.
NOP
GOTO
NOP
Advance Information
0x200
#0x7F, W0
W0, TBLPAG
#<SourceAddress15:0>, W6;(FExx)
#VISI, W7
[W6++], [W7]
0x200
Table 3-10 provides the ICSP programming details for
reading data memory.
Note:
Description
PIC24FXXKAXXX
The TBLPAG register is hard-coded to
0x7F (the upper byte address of all
locations of data memory).
DS39919A-page 19

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