PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 406

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18(L)F2X/4XK22
TBLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
DS41412D-page 406
Table Write
TBLWT ( *; *+; *-; +*)
None
if TBLWT*,
(TABLAT)  Holding Register;
TBLPTR – No Change;
if TBLWT*+,
(TABLAT)  Holding Register;
(TBLPTR) + 1  TBLPTR;
if TBLWT*-,
(TABLAT)  Holding Register;
(TBLPTR) – 1  TBLPTR;
if TBLWT+*,
(TBLPTR) + 1  TBLPTR;
(TABLAT)  Holding Register;
None
This instruction uses the 3 LSBs of
TBLPTR to determine which of the
8 holding registers the TABLAT is written
to. The holding registers are used to
program the contents of Program
Memory (P.M.). (Refer to
“Flash Program Memory”
details on programming Flash memory.)
The TBLPTR (a 21-bit pointer) points to
each byte in the program memory.
TBLPTR has a 2-MByte address range.
The LSb of the TBLPTR selects which
byte of the program memory location to
access.
The TBLWT instruction can modify the
value of TBLPTR as follows:
• no change
• post-increment
• post-decrement
• pre-increment
1
2
operation
Decode
0000
Q1
No
TBLPTR[0] = 0: Least Significant
TBLPTR[0] = 1: Most Significant
operation
operation
TABLAT)
(Read
0000
Q2
No
No
operation
operation
0000
Byte of Program
Memory Word
Byte of Program
Memory Word
Q3
No
No
Section 6.0
for additional
nn=0 *
Register )
operation
operation
(Write to
Holding
=1 *+
=2 *-
=3 +*
11nn
Q4
No
No
Preliminary
TBLWT
Example1:
Example 2:
Before Instruction
After Instructions (table write completion)
Before Instruction
After Instruction (table write completion)
TABLAT
TBLPTR
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
HOLDING REGISTER
(00A356h)
(00A356h)
(01389Ah)
(01389Bh)
(01389Ah)
(01389Bh)
Table Write (Continued)
TBLWT *+;
TBLWT +*;
 2010 Microchip Technology Inc.
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=
55h
00A356h
FFh
55h
00A357h
55h
34h
01389Ah
FFh
FFh
34h
01389Bh
FFh
34h