PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 145

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 10-9:
TABLE 10-10: CONFIGURATION REGISTERS ASSOCIATED WITH PORTC
 2010 Microchip Technology Inc.
ANSELC
ECCP1AS
CCP1CON
ECCP2AS
CCP2CON
CTMUCONH
LATC
PORTC
RCSTA1
SLRCON
SSP1CON1
T1CON
T3CON
T3GCON
T5CON
TRISC
TXSTA1
Legend:
Note 1:
CONFIG3H
Legend:
Name
Name
— = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTC.
Available on PIC18(L)F4XK22 devices.
— = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTC.
CCP1ASE
CCP2ASE
MCLRE
CTMUEN
TMR3GE
TRISC7
ANSC7
Bit 7
LATC7
WCOL
SPEN
CSRC
Bit 7
RC7
TMR1CS<1:0>
TMR3CS<1:0>
TMR5CS<1:0>
REGISTERS ASSOCIATED WITH PORTC
—
P1M<1:0>
P2M<1:0>
T3GPOL
SSPOV
TRISC6
ANSC6
Bit 6
LATC6
Bit 6
RC6
RX9
—
TX9
—
—
CCP2AS<2:0>
CCP1AS<2:0>
CTMUSIDL
P2BMX
TRISC5
ANSC5
SSPEN
T3GTM
Bit 5
LATC5
SREN
TXEN
Bit 5
RC5
T1CKPS<1:0>
T3CKPS<1:0>
T5CKPS<1:0>
—
DC1B<1:0>
DC2B<1:0>
T3CMX
T3GSPM T3GGO/DONE
Preliminary
SLRE
TRISC4
ANSC4
Bit 4
LATC4
TGEN
CREN
SYNC
Bit 4
RC4
CKP
(1)
T1SOSCEN
T3SOSCEN
HFOFST
T5OSCEN
EDGEN
SLRD
TRISC3
ADDEN
SENDB
ANSC3
Bit 3
LATC3
Bit 3
RC3
PIC18(L)F2X/4XK22
PSS1AC<1:0>
PSS2AC<1:0>
(1)
CCP3MX
Bit 2
EDGSEQEN
T1SYNC
T3SYNC
T5SYNC
T3GVAL
CCP1M<3:0>
CCP2M<3:0>
TRISC2
ANSC2
LATC2
SSPM<3:0>
BRGH
FERR
SLRC
Bit 2
RC2
PBADEN
Bit 1
IDISSEN
T1RD16 TMR1ON
T3RD16 TMR3ON
T5RD16 TMR5ON
TRISC1
LATC1
OERR
TRMT
SLRB
Bit 1
RC1
PSS1BD<1:0>
PSS2BD<1:0>
—
T3GSS
CCP2MX
Bit 0
DS41412D-page 145
CTTRIG
TRISC0
LATC0
RX9D
SLRA
TX9D
Bit 0
RC0
—
Register
on Page
Register
on Page
354
153
201
201
329
155
151
273
156
256
170
170
171
170
154
272
205
205