PIC16LF1906T-I/SS Microchip Technology, PIC16LF1906T-I/SS Datasheet - Page 234
PIC16LF1906T-I/SS
Manufacturer Part Number
PIC16LF1906T-I/SS
Description
14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1904-EMV.pdf
(288 pages)
Specifications of PIC16LF1906T-I/SS
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16-bit, 1 x 8-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Package / Case
QFN-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
LIN, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
Details
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PIC16LF1904/6/7
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
TABLE
DS41569A-page 234
Return from Interrupt
[ label ]
None
TOS PC,
1 GIE
None
Return from Interrupt. Stack is POPed
and Top-of-Stack (TOS) is loaded in
the PC. Interrupts are enabled by
setting Global Interrupt Enable bit,
GIE (INTCON<7>). This is a two-cycle
instruction.
1
2
After Interrupt
Return with literal in W
[ label ]
0 k 255
k (W);
TOS PC
None
The W register is loaded with the eight
bit literal ‘k’. The program counter is
loaded from the top of the stack (the
return address). This is a two-cycle
instruction.
1
2
Before Instruction
After Instruction
RETFIE
CALL TABLE;W contains table
•
•
•
ADDWF PC ;W = offset
RETLW k1 ;Begin table
RETLW k2 ;
•
•
•
RETLW kn ; End of table
;offset value
;W now has table value
RETFIE
RETLW k
PC =
GIE =
W
W
=
=
TOS
1
0x07
value of k8
Preliminary
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
RLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
Return from subroutine. The stack is
Return from Subroutine
[ label ]
None
TOS PC
None
POPed and the top of the stack (TOS)
is loaded into the program counter.
This is a two-cycle instruction.
Rotate Left f through Carry
[ label ]
0 f 127
d [ 0 , 1 ]
See description below
C
The contents of register ‘f’ are rotated
one bit to the left through the Carry
flag. If ‘d’ is ‘ 0 ’, the result is placed in
the W register. If ‘d’ is ‘ 1 ’, the result is
stored back in register ‘f’.
1
1
Before Instruction
After Instruction
RLF
2011 Microchip Technology Inc.
RETURN
C
REG1
C
REG1
W
C
RLF
REG1,0
Register f
f,d
=
=
=
=
=
1110 0110
0
1110 0110
1100 1100
1
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