PIC16F616-H/ST Microchip Technology, PIC16F616-H/ST Datasheet - Page 111

• Manufacturer Part Number: PIC16F616-H/ST
• Description: 1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 14 TSSOP 4.4mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F616-H/ST

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 11
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.2
The 8 MHz internal oscillator is factory calibrated.
These calibration values are stored in fuses located in
the Calibration Word (2008h). The Calibration Word is
not erased when using the specified bulk erase
sequence in the Memory Programming Specification
(DS41284) and thus, does not require reprogramming.
12.3
The
between various kinds of Reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
FIGURE 12-1:
© 2009 Microchip Technology Inc.
MCLR/V
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Reset (BOR)
CLKI pin
OSC1/
V
Note 1:
PIC16F610/616/16HV610/616
DD
Calibration Bits
Reset
PP
pin
OST/PWRT
RC OSC
On-Chip
Refer to the Configuration Word register (Register 12-1).
Brown-out
Module
Detect
WDT
Reset
POR
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
OST
PWRT
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
BOREN
Power-on Reset
External
Reset
Sleep
differentiates
PIC16F610/616/16HV610/616
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
WDT wake-up does not cause register resets in the
same manner as a WDT Reset since wake-up is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 12-2. Software can use
these bits to determine the nature of the Reset. See
Table 12-4 for a full description of Reset states of all
registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 12-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 15.0 “Electrical
Specifications” for pulse-width specifications.
Enable PWRT
Enable OST
S
R
DS41288F-page 111
Q
Chip_Reset