PIC16F506-E/MG Microchip Technology, PIC16F506-E/MG Datasheet - Page 79

1.5 KB Flash, 67 RAM, 12 I/O, Comparator, 8bit ADC 16 QFN 3x3x0.9mm TUBE

PIC16F506-E/MG

Manufacturer Part Number
PIC16F506-E/MG
Description
1.5 KB Flash, 67 RAM, 12 I/O, Comparator, 8bit ADC 16 QFN 3x3x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16F506-E/MG

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
FLASH
Ram Size
67 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Processor Series
PIC16F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
RETLW
Syntax:
Operands:
Operation:
Status Affected: None
Description:
RLF
Syntax:
Operands:
Operation:
Status Affected: C
Description:
RRF
Syntax:
Operands:
Operation:
Status Affected: C
Description:
© 2007 Microchip Technology Inc.
Return with Literal in W
[ label ]
0 ≤ k ≤ 255
k → (W);
TOS → PC
The W register is loaded with the
eight-bit literal ‘k’. The program
counter is loaded from the top of
the stack (the return address). This
is a two-cycle instruction.
Rotate Left f through Carry
[ label ] RLF
0 ≤ f ≤ 31
d ∈ [0,1]
See description below
The contents of register ‘f’ are
rotated one bit to the left through
the Carry flag. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is stored back in
register ‘f’.
Rotate Right f through Carry
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
See description below
The contents of register ‘f’ are
rotated one bit to the right through
the Carry flag. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
C
C
RETLW k
RRF f,d
register ‘f’
register ‘f’
f,d
SLEEP
Syntax:
Operands:
Operation:
Status Affected: TO, PD, RBWUF
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SWAPF
Syntax:
Operands:
Operation:
Status Affected: None
Description:
PIC12F510/16F506
Enter SLEEP Mode
[label ]
None
00h → WDT;
0 → WDT prescaler;
1 → TO;
0 → PD
Time-out Status bit (TO) is set. The
Power-down Status bit (PD) is
cleared.
RBWUF is unaffected.
The WDT and its prescaler are
cleared.
The processor is put into Sleep
mode with the oscillator stopped.
See Section 10.9 “Power-Down
Mode (Sleep)” on Sleep for more
details.
Subtract W from f
[label ]
0 ≤ f ≤ 31
d ∈ [0,1]
(f) – (W) → (dest)
Subtract (2’s complement method)
the W register from register ‘f’. If ‘d’
is ‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Swap Nibbles in f
[ label ] SWAPF f,d
0 ≤ f ≤ 31
d ∈ [0,1]
(f<3:0>) → (dest<7:4>);
(f<7:4>) → (dest<3:0>)
The upper and lower nibbles of
register ‘f’ are exchanged. If ‘d’ is
‘0’, the result is placed in W
register. If ‘d’ is ‘1’, the result is
placed in register ‘f’.
SLEEP
SUBWF f,d
DS41268D-page 77

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