PIC16F1517-E/P Microchip Technology, PIC16F1517-E/P Datasheet - Page 103

• Manufacturer Part Number: PIC16F1517-E/P
• Description: 40-pin, 14KB Flash, 512B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 2.3V-5.5V 40
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1517-E/P

• Processor Series: PIC16F151x
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 2.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Package / Case: PDIP-40
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: -
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 28x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

11.2.4
Program memory is programmed using the following
steps:
1.
2.
3.
4.
Before writing to program memory, the word(s) to be
written must be erased or previously unwritten. Pro-
gram memory can only be erased one row at a time. No
automatic erase occurs upon the initiation of the write.
Program memory can be written one or more words at
a time. The maximum number of words written at one
time is equal to the number of write latches. See
Figure 11-5
write latches) for more details.
The write latches are aligned to the Flash row address
boundary
PMADRH:PMADRL, (PMADRH<6:0>:PMADRL<7:5>)
with the lower 5-bits of PMADRL, (PMADRL<4:0>)
determining the write latch being loaded. Write opera-
tions do not cross these boundaries. At the completion
of a program memory write operation, the data in the
write latches is reset to contain 0x3FFF.
 2011 Microchip Technology Inc.
Load the address in PMADRH:PMADRL of the
row to be programmed.
Load each write latch with data.
Initiate a programming operation.
Repeat steps 1 through 3 until all data is written.
WRITING TO FLASH PROGRAM
MEMORY
defined
(row writes to program memory with 32
by
the
upper
10-bits
Preliminary
of
The following steps should be completed to load the
write latches and program a row of program memory.
These steps are divided into two parts. First, each write
latch is loaded with data from the PMDATH:PMDATL
using the unlock sequence with LWLO = 1. When the
last word to be loaded into the write latch is ready, the
LWLO bit is cleared and the unlock sequence
executed. This initiates the programming operation,
writing all the latches into Flash program memory.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Load the PMDATH:PMDATL register pair with
11.
An example of the complete write sequence is shown in
Example
PMADRH:PMADRL register pair; the data is loaded
using indirect addressing.
Note:
Note:
PIC16(L)F1516/7/8/9
Set the WREN bit of the PMCON1 register.
Clear the CFGS bit of the PMCON1 register.
Set the LWLO bit of the PMCON1 register.
When the LWLO bit of the PMCON1 register is
‘1’, the write sequence will only load the write
latches and will not initiate the write to Flash
program memory.
Load the PMADRH:PMADRL register pair with
the address of the location to be written.
Load the PMDATH:PMDATL register pair with
the program memory data to be written.
Execute the unlock sequence
“Flash Memory Unlock
latch is now loaded.
Increment the PMADRH:PMADRL register pair
to point to the next location.
Repeat steps 5 through 7 until all but the last
write latch has been loaded.
Clear the LWLO bit of the PMCON1 register.
When the LWLO bit of the PMCON1 register is
‘0’, the write sequence will initiate the write to
Flash program memory.
the program memory data to be written.
“Flash Memory Unlock
entire program memory latch content is now
written to Flash program memory.
Execute the unlock sequence
11-3. The initial address is loaded into the
The special unlock sequence is required
to load a write latch with data or initiate a
Flash programming operation. If the
unlock sequence is interrupted, writing to
the latches or program memory will not be
initiated.
The program memory write latches are
reset to the blank state (0x3FFF) at the
completion of every write or erase
operation. As a result, it is not necessary
to load all the program memory write
latches. Unloaded latches will remain in
the blank state.
Sequence”). The write
Sequence”). The
DS41452B-page 103
(Section 11.2.2
(Section 11.2.2