PIC12F635T-I/MD Microchip Technology, PIC12F635T-I/MD Datasheet - Page 120
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PIC12F635T-I/MD
Manufacturer Part Number
PIC12F635T-I/MD
Description
1.75 KB Flash, 64 RAM, 6 I/O 8 DFN 4x4mm T/R
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Specifications of PIC12F635T-I/MD
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164326 - MODULA SKT PM3 20QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNXLT08DFN - SOCKET TRANSITION ICE 8DFN
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC12F635/PIC16F636/639
11.31.3.1
The AFE’s RSSI output is an analog current. It needs an
external Analog-to-Digital (ADC) data conversion device
for digitized output. The ADC data conversion can be
accomplished by using a stand-alone external ADC
device or by firmware utilizing MCU’s internal
comparator along with a few external resistors and a
capacitor. For slope ADC implementations, the external
capacitor at the LFDATA pad needs to be discharged
before data sampling. For this purpose, the internal
pull-down MOSFET on the LFDATA pad can be utilized.
The MOSFET can be turned on or off with bit
RSSIFET<8>
(Register 11-3). When it is turned on, the internal
MOSFET provides a discharge path for the external
capacitor. This MOSFET option is valid only if RSSI
output is selected and not controllable by users for
demodulated or carrier clock output options.
See separate application notes for various external ADC
implementation methods for this device.
FIGURE 11-16:
DS41232D-page 118
ANALOG-TO-DIGITAL DATA
CONVERSION OF RSSI SIGNAL
LFDATA/RSSI/
of
SCLK/ALERT
CCLK/SDIO
the
POWER-UP SEQUENCE
CS
Configuration
Register
LFDATA
(output)
(open collector
ALERT
output)
2
11.32
11.32.1
The AFE SPI interface communication is used to read
or write the AFE’s Configuration registers and to send
command only messages. For the SPI interface, the
device has three pads; CS, SCLK/ALERT, and
LFDATA/RSSI/CCLK/SDIO.
Figure 11-14, Figure 11-16 and Figure 11-17 shows
examples of the SPI communication sequences.
When the device powers up, these pins will be
high-impedance inputs until firmware modifies them
appropriately. The AFE pins connected to the MCU
pins will be as follows.
CS
• Pin is permanently an input with an internal pull-up.
SCLK/ALERT
• Pin is an open collector output when CS is high.
LFDATA/RSSI/CCLK/SDIO
• Pin is a digital output (LFDATA) so long as CS is
An internal pull-up resistor exists internal to the
AFE to ensure no spurious SPI communication
between powering and the MCU configuring its
pins. This pin becomes the SPI clock input when
CS is low.
high. During SPI communication, the pin is the
SPI data input (SDI) unless performing a register
Read, where it will be the SPI data output (SDO).
AFE C
SPI COMMUNICATION
onfiguration
© 2007 Microchip Technology Inc.
Figure 11-15,
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