PIC12F519-E/MC Microchip Technology, PIC12F519-E/MC Datasheet - Page 17

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PIC12F519-E/MC

Manufacturer Part Number
PIC12F519-E/MC
Description
1.5KB Flash Program, 64B Flash Data, 8MHz Internal Oscillator 8 DFN 2X3mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F519-E/MC

Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
FLASH
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Interface Type
USB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164334 - MODULE SOCKET FOR 8L 2X3MM DFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
4.0
The
programmed at their default values, or they are not
programmed.
REGISTER 4-1:
© 2007 Microchip Technology Inc.
bit 11
bit 11-7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1: It is the responsibility of the application designer to ensure the use of the 1 ms DRT will result in acceptable operation.
implemented
CONFIGURATION WORD
Refer to Electrical Specifications for V
Unimplemented: Read as ‘1’
CPDF: Code Protection bit – Flash Data Memory
1 = Code protection off
0 = Code protection on
IOSCFS: Internal Oscillator Frequency Select bit
1 = 8 MHz INTOSC speed
0 = 4 MHz INTOSC speed
MCLRE: Master Clear Enable bit
1 = RB3/MCLR pin functions as MCLR
0 = RB3/MCLR pin functions as RB3, MCLR internally tied to V
CP: Code Protection bit – User Program Memory
1 = Code protection off
0 = Code protection on
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC1:FOSC0: Oscillator Selection bits
00 = LP oscillator with 18 ms DRT
01 = XT oscillator with 18 ms DRT
10 = INTRC with 1 ms DRT
11 = EXTRC with 1 ms DRT
CONFIGURATION WORD
Configuration
(1)
bits
(1)
DD
can
rise time and stability requirements for this mode of operation.
CPDF
be
IOSCFS MCLRE
See REGISTER 4-1 below for details.
DD
CP
PIC12F519
WDTE
FOSC1 FOSC0
DS41316B-page 17
bit 0

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