ICS1892Y-14LFT IDT, Integrated Device Technology Inc, ICS1892Y-14LFT Datasheet - Page 132
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ICS1892Y-14LFT
Manufacturer Part Number
ICS1892Y-14LFT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.ICS1892Y-14LFT.pdf
(148 pages)
Specifications of ICS1892Y-14LFT
Lead Free Status / RoHS Status
Compliant
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10.5.9 10M Media Independent Interface: Receive Latency
ICS1892, Rev. D, 2/26/01
Table 10-16
the following pins: TP_RX (that is, the MII TP_RXP and TP_RXN pins), RXCLK, and RXD.
shows the timing diagram for the time periods.
Table 10-16.
Figure 10-9. 10M MII Receive Latency Timing Diagram
TP_RX*
RXCLK
RXD
*Manchester
encoding not
shown.
Period
Time
t1
ICS1892 Data Sheet
First Bit of /5/ on TP_RX to /5/D/ on RXD
lists the significant time periods for the 10M MII timing (which consists of timings of signals on
5
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Parameter
132
5
t1
10M MII
Conditions
Chapter 10 DC and AC Operating Conditions
Min.
–
5
Typ.
7.7
Max.
February 26, 2001
9
Figure 10-9
Bit times
Units
D
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