ADM7001XACT1XP Lantiq, ADM7001XACT1XP Datasheet - Page 49

• Manufacturer Part Number: ADM7001XACT1XP
• Manufacturer: Lantiq

Specifications of ADM7001XACT1XP

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Control Register
CR
Control Register
Field
RST
LPBK
SSL
ANEN
Data Sheet
Bits
15
14
13
12
Type
rwsc
rw
rw
rw
Description
RESET
Setting this bit initiates the software reset function that resets the selected
port, except for the phase-locked loop circuit. It will re-latch in all
hardware configuration pin values. The software reset process takes
25us to complete. This bit, which is self-clearing, returns a value of 1 until
the reset process is complete.
0
1
Back Enable
This bit controls the PHY loop back operation that isolates the network
transmitter outputs (TXP and TXN) and routes the MII transmit data to the
MII receive data path. This function should only be used when auto
negotiation is disabled (bit12 = 0). The specific PHY (10Base-T or
100Base-X) used for this operation is determined by bits 12 and 13.
0
1
Speed Selection LSB
SPEED_LSB
0.60.13
Link speed is selected by this bit or by auto negotiation if bit 12 of this
register is set (in which case, the value of this bit is ignored).
00
01
10
11
Auto Negotiation Enable
This bit determines whether the link speed should set up by the auto
negotiation process or not. It is set at power up or reset if the
PI_RECANEN pin detects a logic 1 input level in Twisted-Pair Mode.
0
1
B
B
B
B
B
B
B
B
B
B
RST_0, Normal operation
RST_1, PHY Reset
LPBK_0, Disable Loop back mode
LPBK_1, Enable loop back mode
10M, 10 Mbit/s
100M, 100 Mbit/s
1000M, 1000 Mbit/s
Res, Reserved
ANEN_0, Disable Auto negotiation process
ANEN_1, Enable auto negotiation process
Offset
00
49
H
Registers Description
Rev. 1.07, 2005-09-12
Data sheet
Reset Value
ADM7001
3000
H