DJLXT905LC.C2 831645 Intel, DJLXT905LC.C2 831645 Datasheet - Page 12

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DJLXT905LC.C2 831645

Manufacturer Part Number
DJLXT905LC.C2 831645
Description
Manufacturer
Intel
Datasheet

Specifications of DJLXT905LC.C2 831645

Lead Free Status / RoHS Status
Not Compliant
LXT905 Universal 10BASE-T Transceiver with 3.3V Support
2.4
12
Figure 4. Jabber Control Function
Jabber Control Function
Figure 4
Dog Timer (WDT) prevents the DTE from locking into a continuous transmit mode. When a
transmission exceeds the time limit, the WDT disables the transmit and loopback functions and
activates the COL pin. Once the LXT905 is in the jabber state, the TXD circuit must remain idle
for a period of 0.25 to 0.75 seconds before it exits the jabber state.
is a state diagram of the LXT905 jabber control function. The LXT905 on-chip Watch-
Unjab_ Timer_Done
DO=Idle
Start_XMIT_MAX_Timer
Nonjabber Output
Start_Unjab_Timer
LPBK=Disable
LPBK=Disable
XMIT=Disable
XMIT=Disable
Unjab Wait
No Output
CI=SQE
CI=SQE
Jab
Power On
DO=Active
DO=Active ∗
XMIT_Max_Timer_Done
DO=Idle
DO=Active ∗
Unjab_Timer_Not_Done
Revision Date: 19-Oct-2005
Document Number: 249271
Revision Number: 004
Datasheet

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