DJLXT905LC.C2 831645 Intel, DJLXT905LC.C2 831645 Datasheet
DJLXT905LC.C2 831645
Specifications of DJLXT905LC.C2 831645
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DJLXT905LC.C2 831645 Summary of contents
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... power supply. Integrated filters simplify the design work required for FCC-compliant EMI performance. The LXT905 is part of the Intel Carrier Class Ethernet family of products. The LXT905 Universal Transceiver offers 10BASE-T connectivity solutions that support operations over an extended temperature range, while providing features that increase reliability. The device has an operational lifetime of at least ten years, with less than 100 failures per billion hours, and is available a minimum of five years after the introduction of the product ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. ...
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Contents 1.0 Pin Assignments and Signal Descriptions 2.0 Functional Description 2.1 Introduction ......................................................................................................................... 10 2.2 Controller Compatibility Modes ........................................................................................... 11 2.3 Transmit Function ...............................................................................................................11 2.4 Jabber Control Function ..................................................................................................... 12 2.5 SQE Function ..................................................................................................................... 13 2.6 Receive Function ................................................................................................................ 13 ...
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... LXT905LC PHY Package Specifications .......................................................................... 36 29 Top-Label Device Marking – Intel® LXT905LC.C2 Transceiver................................................. 37 30 Top-Label Device Marking – Intel® WJLXT905LC.C2 Transceiver ........................................... 37 31 Top-Label Device Marking – Intel® NLXT905PC.C2 Transceiver.............................................. 38 32 Top-Label Device Marking – Intel® EELXT905E.C2 Transceiver .............................................. 38 33 Ordering Information - Sample ................................................................................................... 40 Tables 1 Signal Descriptions ...
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Revision History Page 37 Added Section 6.0, “Top-Label Device Marking” and Figure 29 through Figure 32. Modified Table 16 “Product Information” 39 information. Page Modified Table 16 “Product Information” under Section 6.0, “Ordering Information” (replaced MM 37 numbers). Page 1 ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support Figure 1. Block Diagram Mode Select Logic Controller LI Compatibility / Loopback / TCLK Link Test CLKI XTAL OSC CLKO Manchester TEN Encoder TXD CD Squelch/ Link Detect LEDL RCLK Manchester RXD Decoder ...
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Pin Assignments and Signal Descriptions Figure 2. Pin Assignments 1 LBK 2 TEN 3 TCLK Rev # LQFP 4 TXD 5 COL LXT905LC/LE XX Part # XXXXXX LOT # 6 LEDC/FDE XXXXXXXX FPO # 7 LEDT/PDN 8 LEDR Datasheet ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support L Table 1. Signal Descriptions (Sheet LQFP PLCC Pin # Pin # – 28 – 29 – ...
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Table 1. Signal Descriptions (Sheet LQFP PLCC Pin # Pin # Externally ...
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... Functional Description 2.1 Introduction ® The Intel LXT905 Universal 10BASE-T Transceiver performs the physical layer signaling (PLS) and Media Attachment Unit (MAU) functions, as defined in the IEEE 802.3 specification. It functions as an integrated PLS/MAU for use with 10BASE-T twisted-pair networks. The LXT905 interfaces a back-end controller to a twisted-pair (TP) cable. The controller interface includes a transmit and receive clock and NRZ data channels, and mode control logic and signaling ...
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... Mode 2 - For Intel* 82596 or compatible controllers Mode 3 - For Fujitsu* MB86950, MB86960 or compatible controllers (Seeq* 8005) Mode 4 - For TI* TMS380C26 or compatible controllers 1. Refer to the MAC Interface Design Guide for Intel Controllers Application Note when designing with Intel controllers. 2. SEEQ* controllers require inverters on CLKI, LBK, RCLK, and COL. ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support 2.4 Jabber Control Function Figure state diagram of the LXT905 jabber control function. The LXT905 on-chip Watch- Dog Timer (WDT) prevents the DTE from locking into a continuous transmit mode. ...
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... NRZ data on the RXD pin, and as receive timing on the RCLK pin. An internal RC filter and an intelligent squelch function discriminate noise from link test pulses and valid data streams. The receive function activates only when receiving valid data streams above the squelch level with proper timing ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support 2.7 Polarity Reverse Function The LXT905 polarity reverse function uses both link pulses and end-of-frame data to determine the polarity of the received signal. • If you disable Link Integrity testing, polarity detection ...
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Figure 6. Collision Detection Function 2.9 Loopback Functions 2.9.1 Internal Loopback The LXT905 provides a standard loopback mode, as specified in the IEEE specification for the twisted-pair port. It also provides a forced internal loopback mode. Loopback mode operates in ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support Table 3. Loopback Modes Pin Settings LBK LEDC/FDE Low Low Low High High Low High High 2.10 Link Integrity Test Function Figure state diagram of the LXT905 link integrity test ...
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Figure 7. Link Integrity Test Function Power On Idle Test Start_Link_Loss_Timer Start_Link_Test_Min_Timer Link_Loss_Timer_Done ∗ TPI=Idle ∗ Link_Test_Rcvd=False Link Test Fail Reset Link_Count=0 XMIT=Disable RCVR=Disable LPBK=Disable Link_Test_Rcvd=False TPI=Active ∗ TPI=Idle Link Test Fail Extended XMIT=Disable RCVR=Disable LPBK=Disable TPI=Idle ∗ DO=Idle Datasheet ...
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... Termination Circuitry The LXT905 pulls several I/O pins up or down internally, to keep the signals from floating. Intel recommends hard-wiring these pins either High or Low. Externally pull-up pins (LEDT/PDN, LEDC/FDE, LEDR, LEDL) and pull-down pins (LBK, TEN, TXD, DSQE, MDO, MDI) separately, using Ω ...
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... RJ-45 connector. With MD0 tied high and MD1 grounded, this example sets the LXT905 logic and framing to Mode 2 (compatible with Intel* 82596 controllers). Connect a 20 MHz system clock input at CLKI (leave CLKO open). The LI pin externally controls the link test function. ® ...
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... LXT905 Universal 10BASE-T Transceiver with 3.3V Support ® Figure 8. Intel Controller Application (Mode 2) Not Connected CLK 20 MHz System Clock TXD RTS 82596 TXC Back-End/ Controller RXC Interface RXD CRS CDT Programming Options Link Test Enable Loopback Enable Line Status 10K 10K ...
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... Mode 4 (MD0 and MD1 both high). When you use the LXT905 with the 380C26, you can tie both the LXT905 and a TMS38054* Token Ring transceiver to a single RJ-45, allowing dual network support from a single connector. ® Figure 9. Intel LXT905 PHY/Texas Instruments* 380C26 Interface for Dual 10BASE-T and Token Ring Support (Mode TMS38054 ...
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... Simple 10BASE-T Connection Figure 10 shows a simple 10BASE-T application, using an LXT905 transceiver and a Motorola* MC68EN360. The MC68EN360 is compatible with Mode 1 (MD0 and MD1 both Low). ® Figure 10. Intel LXT905 PHY/Motorola* MC68EN360 Interface for Full-Duplex 10BASE-T (Mode 1) 20 MHz System MC68EN360 Clock ...
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... These specifications are guaranteed by test, except where noted by design. Minimum and maximum values in Table 7 conditions specified in For all Quality and Reliability issues (for example, parts packaging and thermal specifications), please send your questions to Intel at the following e-mail address: qr.requests@intel.com. Table 5. Absolute Maximum Values Parameter Supply voltage ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support Table 7. I/O Electrical Characteristics (Sheet Parameter Output fall CMOS time TTL TCLK & RCLK CLKI rise time (externally driven) CLKI duty cycle (externally driven) Normal Mode Supply current Power ...
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Table 10. RCLK/Start-of-Frame Timing Parameter Decoder acquisition time CD turn-on delay Receive data setup from RCLK Receive data hold from RCLK RCLK shut off delay from CD assert (Mode 3) 1. Typical values are at 25 °C, are for design ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support Table 13. Miscellaneous Timing Parameter COL (SQE) Delay after TEN off COL (SQE) Pulse Duration Power Down recovery time 1. Typical values are at 25 °C, are for design aid only, are not ...
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Timing Diagrams for Mode 1 (MD1 = Low, MD0 = Low) Timing diagrams for Mode 1 include Figure 11. Mode 1 RCLK/Start-of-Frame Timing TPIP/TPIN RCLK t DATA RXD Figure 12. Mode ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support Figure 13. Mode 1 Transmit Timing TEN t EHCH TCLK TXD t STUD TPO Figure 14. Mode 1 COL Output Timing TEN COL 28 t CHEL t DSCH t CHDU t TPD t ...
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Timing Diagrams for Mode 2 (MD1 = Low, MD0 = High) Timing diagrams for Mode 2 include Figure 15. Mode 2 RCLK/Start-of-Frame TPIP/TPIN RCLK t DATA RXD NOTE: 1. RXD changes at ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support Figure 17. Mode 2 Transmit Timing TEN t EHCH TCLK TXD t STUD TPO Figure 18. Mode 2 COL Output Timing TEN COL NOTE output is disabled for a maximum of ...
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Timing Diagrams for Mode 3 (MD1 = High, MD0 = Low) Timing diagrams for Mode 3 include Figure 19. Mode 3 RCLK/Start-of-Frame Timing TPIP/TPIN SWS RCLK Generated from TCLK t ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support Figure 21. Mode 3 Transmit Timing TEN t EHCH TCLK TXD t STUD TPO Figure 22. Mode 3 COL Output Timing TEN COL DSCH CHDU t TPD t SQED t ...
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Timing Diagrams for Mode 4 (MD1 = High, MD0 = High) Timing diagrams for Mode 4 include Figure 23. Mode 4 RCLK/Start-of-Frame Timing TPIP/TPIN t CD CRS RCLK t DATA RXD NOTE: 1. RXD ...
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LXT905 Universal 10BASE-T Transceiver with 3.3V Support Figure 25. Mode 4 Transmit Timing TEN t EHCH TCLK TXD t STUD TPO Figure 26. Mode 4 COL Output Timing TEN COL DSCH CHDU t TPD t t CHEL ...
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... Mechanical Specifications Figure 27. Intel® LXT905PC PHY Package Specifications 28-Pin PLCC • Part Number LXT905PC (Commercial Temperature Range) • Part Number LXT905PE (Extended Temperature Range) Table 14. Plastic Leaded Chip Carrier Datasheet Document Number: 249271 Revision Number: 004 Revision Date: 19-Oct-2005 LXT905 Universal 10BASE-T Transceiver with 3 ...
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... LXT905 Universal 10BASE-T Transceiver with 3.3V Support ® Figure 28. Intel LXT905LC PHY Package Specifications 32-Pin LQFP • Part Number LXT905LC (Commercial Temperature Range) • Part Number LXT905LE (Extended Temperature Range All Dimensions in millimeters Table 15. Quad Flat Package All Dimensions in millimeters Dim. ...
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... In contrast to the Pb-Free (RoHS-compliant) package, the non-RoHS-compliant package does not have the “e3” symbol in the last line of the package label. Figure 29. Top-Label Device Marking – Intel® DJLXT905LC.C2 Transceiver Pin 1 Figure 30. Top-Label Device Marking – Intel® WJLXT905LC.C2 Transceiver Pin 1 Datasheet Document Number: 249271 ...
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... LXT905 Universal 10BASE-T Transceiver with 3.3V Support Figure 31. Top-Label Device Marking – Intel® NLXT905PC.C2 Transceiver Pin 1 Figure 32. Top-Label Device Marking – Intel® EELXT905E.C2 Transceiver Pin 1 38 LXT905PC C2 XXXXXXXX BSMC EELXT905E C2 XXXXXXXX BSMC e3 Part Number FPO Number Bottom Side Mark Code ...
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Ordering Information Table 16 lists the LXT905 Transceiver product ordering information. Table 16. Product Information Number DJLXT905LC.C2 WJLXT905LC.C2 DJLXT905LE.C2 WJLXT905LE.C2 NLXT905PC.C2 EELXT905PC.C2 NLXT905PE.C2 EELXT905PE.C2 Datasheet Document Number: 249271 Revision Number: 004 Revision Date: 19-Oct-2005 LXT905 Universal 10BASE-T Transceiver with ...
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... C = CBGA E = TBGA K = HSBGA (BGA with heat slug Product Code xxxxx = 3-5 Digit alphanumeric IXA Product Prefix LXT = PHY layer device IXE = Switching engine IXF = Formatting device (MAC/Framer) IXP = Network processor Intel Package Designator B5361-01 Datasheet Document Number: 249271 Revision Number: 004 ...