L-ET1011C2-C-D LSI, L-ET1011C2-C-D Datasheet - Page 30

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L-ET1011C2-C-D

Manufacturer Part Number
L-ET1011C2-C-D
Description
Manufacturer
LSI
Datasheet

Specifications of L-ET1011C2-C-D

Number Of Receivers
1
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Lead Free Status / RoHS Status
Compliant

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Gigabit Ethernet Transceiver
Hardware Interfaces
Table 10. Configuration Signals (continued)
1. In the 68-MLCC, MAC_IF_SEL 2 (= 1) will be set internally. Also, for all package types:
30
Pin Name
MAC_IF_
— MAC_IF_SEL pins = 100 will set MAC interface mode select bits in register 22.2:0 = 110; alternative RGMII TXC DLL Delay bit 23.6 = 1.
— MAC_IF_SEL pins = 101 will set MAC interface mode select bits in register 22.2:0 = 111; alternative RGMII TXC DLL Delay bit 23.6 = 1.
— MAC_IF_SEL pins = 110 will set MAC interface mode select bits in register 22.2:0 = 110; alternative RGMII TXC DLL Delay bit 23.6 = 0.
— MAC_IF_SEL pins = 111 will set MAC interface mode select bits in register 22.2:0 = 111; alternative RGMII TXC DLL Delay bit 23.6 = 0.
SEL[2:0]
128-Pin
TQFP
Pin #
20
19
18
MLCC
84-Pin
Pin #
18
17
16
(continued)
(MAC_IF_
SEL[1:0]
Note 1.)
MLCC
68-Pin
Pin #
(See
10
9
MAC Inter-
face Mode
Description
Pin
This input selects the desired MAC interface mode.
Configure the MAC during reset as follows:
000 = GMII/MII (84-Pin MLCC default).
001 = TBI
010 = GMII/MII (clocked by GTX_CLK instead of
TX_CLK).
011 = Reserved
100 = RGMII/RMII (RXC DLL delay; 68-MLCC default)
101 = RTBI (RXC DLL delay)
110 = RGMII/RMII (RXC and TXC DLL delay)
111 = RTBI (RXC and TXC DLL delay)
.
.
Functional Description
1
.
September 2007
1
.
LSI Corporation
1
.
1
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